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AD9910 Datenblatt(PDF) 3 Page - Analog Devices

Teilenummer AD9910
Bauteilbeschribung  1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9910 Datenblatt(HTML) 3 Page - Analog Devices

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AD9910
Rev. 0 | Page 3 of 60
Power-Down Control .................................................................41
Synchronization of Multiple Devices............................................43
Serial Programming ........................................................................46
Control Interface—Serial I/O....................................................46
General Serial I/O Operation ....................................................46
Instruction Byte...........................................................................46
Instruction Byte Information Bit Map .................................46
Serial I/O Port Pin Descriptions ...............................................46
SCLK—Serial Clock................................................................46
CS—Chip Select Bar ...............................................................46
SDIO—Serial Data Input/Output .........................................46
SDO—Serial Data Out ...........................................................46
I/O_RESET—Input/Output Reset ........................................46
I/O_UPDATE—Input/Output Update ................................47
Serial I/O Timing Diagrams ......................................................47
MSB/LSB Transfers .....................................................................47
Register Map and Bit Descriptions ...............................................48
Register Bit Descriptions............................................................53
Control Function Register 1 (CFR1)....................................53
Control Function Register 2 (CFR2)....................................55
Control Function Register 3 (CFR3)....................................56
Auxiliary DAC Control Register...........................................56
I/O Update Rate Register.......................................................57
Frequency Tuning Word Register (FTW) ...........................57
Phase Offset Word Register (POW).....................................57
Amplitude Scale Factor Register (ASF) ...............................57
Multichip Sync Register .........................................................58
Digital Ramp Limit Register..................................................58
Digital Ramp Step Size Register............................................58
Digital Ramp Rate Register ...................................................58
Profile Registers ......................................................................59
Outline Dimensions........................................................................60
Ordering Guide ...........................................................................60
REVISION HISTORY
5/07—Revision 0: Initial Version


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