Datenblatt-Suchmaschine für elektronische Bauteile |
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MC100EP16 Datenblatt(PDF) 3 Page - ON Semiconductor |
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MC100EP16 Datenblatt(HTML) 3 Page - ON Semiconductor |
3 / 8 page TND301 http://onsemi.com 3 Clock Management Highways Clock Management is included in electronic systems that contain backplanes (see Figure 4). Backplanes are the physical highways for clocks. They are multilayer printed circuit boards that are on the back of a card cage and have connectors that each circuit card plugs into. The design of the backplane is very critical to the performance of the Clock Management system. Many factors must be considered for a good backplane design. The Clock Generator is typically on a circuit card with Clock Distribution circuits. The clocks are distributed throughout the cards on the backplane and each card may then redistribute, delay, divide, and translate these clock signals. Backplanes are noisy due to the high amount of electronic signal traffic. Standard connectors are also a problem on a backplane since they do not offer a good transition due to impedance mismatch. Most connectors do not offer differential signal capability and do not provide adequate ground pins for elimination of crosstalk. Backplanes tend to slow down signals because they have multiple layers which add capacitance and delay. Figure 4. Example of Backplanes Clock Management systems distribute clocks over backplanes in super–and mini–computers, communication equipment like PABX, SONET/SDH systems, ATM, and advance test equipment. |
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