TDA4855 datasheet(11/44 Pages) PHILIPS

Teilenummer	TDA4855

Bauteilbeschribung	Autosync Deflection Controller ASDC

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Hersteller	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

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11 / 44 page

1996 Jul 18

11

Philips Semiconductors

Preliminary speciﬁcation

Autosync Deﬂection Controller (ASDC)

TDA4855

Supply voltage stabilizer, references and protection

The ASDC provides an internal supply voltage stabilizer

for excellent stabilization of all internal references.

An internal gap reference especially designed for

low-noise is the reference for the internal horizontal and

vertical supply voltages. All internal reference currents and

drive current for the vertical output stage are derived from

this voltage via external resistors.

A special protection mode has been implemented in order

to protect the deflection stages and the picture tube during

start-up, shut-down and fault conditions. This protection

mode can be activated as shown in Table 4.

Table 4

Activation of protection mode

When protection mode is active, several pins of the ASDC

are forced into a defined state:

HDRV (horizontal driver output) is floating

BDRV (B+ control driver output) is floating

VOUT1 and VOUT2 (vertical outputs) are floating

CLBL provides a continuous blanking signal

The capacitor at HPLL2 is discharged.

If the protection mode is activated via the supply voltage at

pin 9, all these actions will be performed in a well defined

sequence (see Fig.14). For activation via X-ray protection

or HPLL2 all actions will occur simultaneously.

ACTIVATION

RESET

Low supply voltage at pin 9

increase supply voltage

X-ray protection XRAY (pin 2)

triggered

remove supply voltage

HPLL2 (pin 31) pulled to

ground

release pin 31

The return to normal operation is performed in accordance

with the start-up sequence in Fig.14a, if the reset was

caused by the supply voltage at pin 9. The first action with

increasing supply voltage is the activation of continuous

blanking at CLBL. When the threshold for activation of

HDRV is passed, an internal current begins to charge the

external capacitor at HPLL2 and a PLL2 soft start

sequence is performed (see Fig.15). In the beginning of

this phase the horizontal driver stage generates very small

output pulses. The width of these pulses increases with the

voltage at HPLL2 until the final duty cycle is reached.

Then the PLL2 voltage passes the threshold for activation

of BDRV, VOUT1 and VOUT2.

For activation of these pins not only the PLL2 voltage, but

also the supply voltage must have passed the appropriate

threshold. A last pair of thresholds has to be passed by

PLL2 voltage and supply voltage before the continuous

blanking is finally removed, and the operation of PLL2 and

frequency-locked loop is enabled.

A return to the normal operation by releasing the voltage

at HPLL2 will lead to a slightly different sequence. Here the

activation of all functions is influenced only by the voltage

at HPLL2 (see Fig.15).

Application hint: Internal discharge of the capacitor at

HPLL2 will only be performed, if the protection mode was

activated via the supply voltage or X-ray protection.

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