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TDA8764 Datenblatt(PDF) 10 Page - NXP Semiconductors |
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TDA8764 Datenblatt(HTML) 10 Page - NXP Semiconductors |
10 / 28 page 1999 Jan 12 10 Philips Semiconductors Preliminary specification 10-bit high-speed low-power ADC with internal reference regulator TDA8764 Switching characteristics CLOCK INPUT; CLK; see Fig.5; note 1 fclk(max) maximum clock frequency TDA8764TS/4; TDA8764HL/4 40 −− MHz TDA8764TS/8; TDA8764HL/8 80 −− MHz tCPH clock pulse width HIGH TDA8764TS/4; TDA8764HL/4 7 −− ns TDA8764TS/8; TDA8764HL/8 5 −− ns tCPL clock pulse width LOW TDA8764TS/4; TDA8764HL/4 7 −− ns TDA8764TS/8; TDA8764HL/8 5 −− ns Analog signal processing LINEARITY INL integral non-linearity TDA8764TS/4; TDA8764HL/4 fclk = 40 MHz; ramp input −±0.8 tbf LSB TDA8764TS/8; TDA8764HL/8 fclk = 80 MHz; ramp input −±0.8 tbf LSB DNL differential non-linearity TDA8764TS/4; TDA8764HL/4 fclk = 40 MHz; ramp input −±0.25 tbf LSB TDA8764TS/8; TDA8764HL/8 fclk = 80 MHz; ramp input −±0.25 tbf LSB Eoffset offset error middle code −±1 − LSB EG gain error (from device to device) using internal reference voltage note 5 − tbf − % BANDWIDTH (fclk =40MHZ)/4 VERSION; B analog bandwidth full-scale sine wave; note 6 − 20 − MHz 75% full-scale sine wave; note 6 − 30 − MHz small signal at mid-scale; VI = ±10 LSB at code 512; note 6 − 350 − MHz tstLH analog input settling time LOW-to-HIGH full-scale square wave; see Fig.7 and note 7 − tbf tbf ns tstHL analog input settling time HIGH-to-LOW full-scale square wave; see Fig.7 and note 7 − tbf tbf ns SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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Ähnliche Beschreibung - TDA8764 |
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