Rx ASIC for CDMA, AMPS, and PCS Applications

CX74001

101134A

Skyworks

5

March 5, 2002

Proprietary Information and Specifications are Subject to Change

Table 1. CX74001 Pin Assignments and Signal Descriptions (2 of 4)

Pin #

Name

Description

Equivalent Circuit

16

PLL+

Differential buffered VCO output.

–

+

Vcc

Vcc

17

PLL–

Differential buffered VCO output.

18

SIF

Digital control signal for SIF selection: 1 = SIF, 0 = Normal.

19

I–

I channel differential output.

20

I+

I channel differential output.

21

Q+

Q channel differential output.

22

Q–

Q channel differential output.

23

SLEEP

Digital signal used to activate the receiver ASIC: 0 = sleep, 1= enable.

24

VGA_CONTROL

Analog gain control of the VGA. Typical 0.5 to 2.5 V to control VGA dynamic range of greater

than 90dB.

25

VCC_IF

Voltage supply to VGA from I/Q demodulator stages and logic blocks. Supply should be

bypassed to prevent signal modulation to the supply line.

26

CDMA_VGA_IN–

CDMA differential VGA input

27

CDMA_VGA_IN+

CDMA differential VGA input

–

+

28

AMPS_VGA_IN

AMPS VGA input

29

PCS_VGA_IN–

PCS differential VGA input

30

PCS_VGA_IN+

PCS differential VGA input

–

+