Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

TSL1401R-LF Datenblatt(PDF) 8 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

Teilenummer TSL1401R-LF
Bauteilbeschribung  128 횞 1 LINEAR SENSOR ARRAY WITH HOLD
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Direct Link  http://www.taosinc.com
Logo TAOS - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

TSL1401R-LF Datenblatt(HTML) 8 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

Back Button TSL1401R-LF Datasheet HTML 4Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 5Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 6Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 7Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 8Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 9Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 10Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 11Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL1401R-LF Datasheet HTML 12Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS  
Zoom Inzoom in Zoom Outzoom out
 8 / 12 page
background image
TSL1401R−LF
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS076B − APRIL 2007
8
r
r
Copyright E 2007, TAOS Inc.
The LUMENOLOGY r Company
www.taosinc.com
APPLICATION INFORMATION
Integration Time
The integration time of the linear array is the period during which light is sampled and charge accumulates on
each pixel’s integrating capacitor. The flexibility to adjust the integration period is a powerful and useful feature
of the TAOS TSL14xx linear array family. By changing the integration time, a desired output voltage can be
obtained on the output pin while avoiding saturation for a wide range of light levels.
The integration time is the time between the SI (Start Integration) positive pulse and the HOLD positive pulse
minus the 18 setup clocks. The TSL14xx linear array is normally configured with the SI and HOLD pins tied
together. This configuration will be assumed unless otherwise noted. Sending a high pulse to SI (observing
timing rules for setup and hold to clock edge) starts a new cycle of pixel output and integration setup. However,
a minimum of (n+1) clocks, where n is the number of pixels, must occur before the next high pulse is applied
to SI. It is not necessary to send SI immediately on/after the (n+1) clocks. A wait time adding up to a maximum
total of 100 ms between SI pulses can be added to increase the integration time creating a higher output voltage
in low light applications.
Each pixel of the linear array consists of a light-sensitive photodiode. The photodiode converts light intensity
to a voltage. The voltage is sampled on the Sampling Capacitor by closing switch S2 (position 1) (see the
Functional Block Diagram on page 1). Logic controls the resetting of the Integrating Capacitor to zero by closing
switch S1 (position 2).
At SI input, all of the pixel voltages are simultaneously scanned and held by moving S2 to position 2 for all pixels.
During this event, S2 for pixel 1 is in position 3. This makes the voltage of pixel 1 available on the analog output.
On the next clock, S2 for pixel 1 is put into position 2 and S2 for pixel 2 is put into position 3 so that the voltage
of pixel 2 is available on the output.
Following the SI pulse and the next 17 clocks after the SI pulse is applied, the S1 switch for all pixels remains
in position 2 to reset (zero out) the integrating capacitor so that it is ready to begin the next integration cycle.
On the rising edge of the 19th clock, the S1 switch for all the pixels is put into position 1 and all of the pixels begin
a new integration cycle.
The first 18 pixel voltages are output during the time the integrating capacitor is being reset. On the 19th clock
following an SI pulse, pixels 1 through 18 have switch S2 in position 1 so that the sampling capacitor can begin
storing charge. For the period from the 19th clock through the nth clock, S2 is put into position 3 to read the output
voltage during the nth clock. On the next clock the previous pixel S2 switch is put into position 1 to start sampling
the integrating capacitor voltage. For example, S2 for pixel 19 moves to position 1 on the 20th clock. On the n+1
clock, the S2 switch for the last (nth) pixel is put into position 1 and the output goes to a high-impedance state.
If a SI was initiated on the n+1 clock, there would be no time for the sampling capacitor of pixel n to charge to
the voltage level of the integrating capacitor. The minimum time needed to guarantee the sampling capacitor
for pixel n will charge to the voltage level of the integrating capacitor is the charge transfer time of 20 μs.
Therefore, after n+1 clocks, an extra 20 μs wait must occur before the next SI pulse to start a new integration
and output cycle.
The minimum integration time for any given array is determined by time required to clock out all the pixels
in the array and the time to discharge the pixels. The time required to discharge the pixels is a constant.
Therefore, the minimum integration period is simply a function of the clock frequency and the number of pixels
in the array. A slower clock speed increases the minimum integration time and reduces the maximum light level
for saturation on the output. The minimum integration time shown in this data sheet is based on the maximum
clock frequency of 8 MHz.


Ähnliche Teilenummer - TSL1401R-LF

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
List of Unclassifed Man...
TSL1401R ETC-TSL1401R Datasheet
117Kb / 10P
   128 횞 1 LINEAR SENSOR ARRAY WITH HOLD
More results

Ähnliche Beschreibung - TSL1401R-LF

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
TEXAS ADVANCED OPTOELEC...
TSL1401CS-LF TAOS-TSL1401CS-LF Datasheet
258Kb / 18P
   128 횞 1 LINEAR SENSOR ARRAY WITH HOLD
logo
ams AG
TSL1401CS AMSCO-TSL1401CS Datasheet
686Kb / 19P
   128 횞 1 LINEAR SENSOR ARRAY WITH HOLD
logo
List of Unclassifed Man...
TSL1401CL ETC2-TSL1401CL Datasheet
188Kb / 16P
   128 횞 1 LINEAR SENSOR ARRAY WITH HOLD
TSL1401R ETC-TSL1401R Datasheet
117Kb / 10P
   128 횞 1 LINEAR SENSOR ARRAY WITH HOLD
logo
TEXAS ADVANCED OPTOELEC...
TSLW1401R TAOS-TSLW1401R Datasheet
125Kb / 10P
   EXTENDED TEMPERATURE 128 횞 1 LINEAR SENSOR ARRAY WITH HOLD
logo
List of Unclassifed Man...
TSL1401CS ETC-TSL1401CS Datasheet
169Kb / 14P
   128 1 LINEAR SENSOR ARRAY WITH HOLD
logo
Texas Instruments
TSL401 TI-TSL401 Datasheet
105Kb / 7P
[Old version datasheet]   128 횞 1 LINEAR SENSOR ARRAY
logo
TEXAS ADVANCED OPTOELEC...
TSL1412S TAOS-TSL1412S Datasheet
206Kb / 12P
   1536 횞 1 LINEAR SENSOR ARRAY WITH HOLD
TSL1410R TAOS-TSL1410R Datasheet
205Kb / 12P
   1280 횞 1 LINEAR SENSOR ARRAY WITH HOLD
TSL1402R TAOS-TSL1402R Datasheet
226Kb / 14P
   256 횞 1 LINEAR SENSOR ARRAY WITH HOLD
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com