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74AUP1G74DC Datenblatt(PDF) 2 Page - NXP Semiconductors |
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74AUP1G74DC Datenblatt(HTML) 2 Page - NXP Semiconductors |
2 / 23 page 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 2 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger s IOFF circuitry provides partial Power-down mode operation s Multiple package options s Specified from −40 °Cto+85 °C and −40 °C to +125 °C 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G74DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AUP1G74GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74AUP1G74GM −40 °C to +125 °C XQFN8 plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking Type number Marking code 74AUP1G74DC p74 74AUP1G74GT p74 74AUP1G74GM p74 Fig 1. Logic symbol Fig 2. IEC logic symbol mnb139 RD FF SD 7 Q Q Q 5 2 1 3 Q SD CP CP D D 6 RD mnb140 3 1 2 C1 7 S 1D 6 R 5 |
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Ähnliche Beschreibung - 74AUP1G74DC |
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