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TA1384FNG Datenblatt(PDF) 9 Page - Toshiba Semiconductor |
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TA1384FNG Datenblatt(HTML) 9 Page - Toshiba Semiconductor |
9 / 22 page TA1384FNG 2004/11/24 9 I²C Bus Line Characteristic CHARACTERISTICS SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT SCL Clock Frequency fscl 0 - 400 kHz Bus Free Time between a STOP and a START Condition tBUF 1.3 - - µs Hold Time (Repeated) START Condition tHD;STA 0.6 - - µs Low Period of the SCL Clock tLOW 1.3 - - µs High Period of the SCL Clock tHIGH 0.6 - - µs Set-up Time for a Repeated START Condition tSU;STA 0.6 - - µs Data Hold Time tHD;DAT 0 - 0.9 µs Data Set-up Time tSU;DAT 100 - - µs Rise Time of both SDA and SCL Signal tR - - 300 µs Fall Time of both SDA and SCL Signals tF - - 300 µs Set up Time for STOP Condition tsU;STO - 0.6 - - µs Timing charts may be simplified for explanatory purposes. Figure 1: I²C-bus data timing chart (falling edge timing) tBUF SDA tR tHD; STA tHD; DAT tHIGH tSU; STA Sr tSU; STO P S SCL tLOW P tF tSU; DAT tHD; STA |
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