TC74VCXR162600FT

2007-10-19

1

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74VCXR162600FT

Low-Voltage 18-Bit Universal Bus Transceiver with 3.6-V Tolerant Inputs and Outputs

The TC74VCXR162600FT is a high-performance CMOS 18-bit

universal bus transceiver. Designed for use in 1.8-V, 2.5-V or

3.3-V systems, it achieves high-speed operation while

maintaining the CMOS low power dissipation.

It is also designed with overvoltage tolerant inputs and outputs

up to 3.6 V.

Data flow in each direction is controlled by output-enable

(OEAB and OEBA), latch-enable (LEAB and LEBA), and clock

(CKAB and CKBA) inputs. The clock can be controlled by the

clock-enable (CKENAB and CKENBA) inputs.

For A-to-B data flow, the device operates in the transparent

mode when LEAB is high. When LEAB is low, the A data is

latched if CKAB is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/flip-flop on

the high-to-low transition of CKAB.

Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, CKBA, and CKENBA.

When the OE input is high, the outputs are in a high-impedance state. This device is designed to be used with

3-state memory address drivers, etc.

The 26-Ω series resistor helps reducing output overshoot and undershoot without external resistor.

All inputs are equipped with protection circuits against static discharge.

Features (Note)

•

26-Ω series resistors on outputs

•

•

Latch-up performance:

−300 mA

• ESD performance: Machine model ≥ ±200 V

Human body model

≥ ±2000 V

•

Package: TSSOP

•

Bidirectional interface between 2.5 V and 3.3 V signals.

•

3.6-V tolerant function and power-down protection provided on all inputs and outputs

Note:

Do not apply a signal to any bus pins when it is in the output mode. Damage may result.

All floating (high impedance) bus pins must have their input level fixed by means of pull-up or pull-down

resistors.

Weight: 0.25 g (typ.)