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74AC280 Datenblatt(PDF) 1 Page - STMicroelectronics |
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74AC280 Datenblatt(HTML) 1 Page - STMicroelectronics |
1 / 8 page 74AC280 9 BIT PARITY GENERATOR ® December 1998 s HIGH SPEED: tPD = 4 ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =4 µA (MAX.) at TA =25 oC s HIGH NOISE IMMUNITY: VNIH =VNIL =28% VCC (MIN.) s 50 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 24 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 280 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The AC280 is an advanced high-speed CMOS 9 BIT PARITY GENERATOR fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. It is composed of nine data inputs (A to I) and odd/even parity outputs ( ΣODD and ΣEVEN). The nine data inputs control the output conditions. When the number of high level input is odd, ΣODD output is kept high and ΣEVEN output low. Conservely, when the output is even, ΣEVEN output is kept high and ΣODD low. The IC generates either odd or even parity making it flexible application. The word-length capability is easily expanded by cascading. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES : 74AC280B 74AC280M M (Micro Package) B (Plastic Package) 1/8 |
Ähnliche Teilenummer - 74AC280 |
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Ähnliche Beschreibung - 74AC280 |
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