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L6563 Datenblatt(PDF) 4 Page - STMicroelectronics

Teilenummer L6563
Bauteilbeschribung  Advanced transition-mode PFC controller
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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Description
L6563 - L6563A
4/39
1.1
Pin connection
Figure 3.
Pin connection (top view)
1.2
Pin description
INV
COMP
MULT
CS
VFF
TBO
PFC_OK
Vcc
GD
GND
ZCD
RUN
PWM_STOP
PWM_LATCH
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Table 2. Pin description
Pin N°
Name
Description
1INV
Inverting input of the error amplifier. The information on the output voltage of the PFC pre-
regulator is fed into the pin through a resistor divider.
The pin normally features high impedance but, if the tracking boost function is used, an
internal current generator programmed by TBO (pin 6) is activated. It sinks current from the
pin to change the output voltage so that it tracks the mains voltage.
2COMP
Output of the error amplifier. A compensation network is placed between this pin and INV
(pin 1) to achieve stability of the voltage control loop and ensure high power factor and low
THD.
3MULT
Main input to the multiplier. This pin is connected to the rectified mains voltage via a
resistor divider and provides the sinusoidal reference to the current loop. The voltage on
this pin is used also to derive the information on the RMS mains voltage.
4CS
Input to the PWM comparator. The current flowing in the MOSFET is sensed through a
resistor, the resulting voltage is applied to this pin and compared with an internal reference
to determine MOSFET’s turn-off.
A second comparison level at 1.7V detects abnormal currents (e.g. due to boost inductor
saturation) and, on this occurrence, shuts down the IC, reduces its consumption almost to
the start-up level and asserts PWM_LATCH (pin 8) high. This function is not present in the
L6563A.
5VFF
Second input to the multiplier for 1/V2 function. A capacitor and a parallel resistor must be
connected from the pin to GND. They complete the internal peak-holding circuit that
derives the information on the RMS mains voltage. The voltage at this pin, a DC level equal
to the peak voltage at pin MULT (pin 3), compensates the control loop gain dependence on
the mains voltage. Never connect the pin directly to GND.


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