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ST62T15C Datenblatt(PDF) 4 Page - STMicroelectronics

Teilenummer ST62T15C
Bauteilbeschribung  8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, OSCILLATOR SAFEGUARD, SAFE RESET AND 28 PINS
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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ST62T15C/T25C/E25C
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST62T15C,T25C and ST62E25C devices are
low cost members of the ST62xx 8-bit HCMOS
family of microcontrollers, which is targeted at low
to medium complexity applications. All ST62xx de-
vices are based on a building block approach: a
common core is surrounded by a number of on-
chip peripherals.
The ST62E25C is the erasable EPROM version of
the ST62T15C,T25C device, which may be used
to emulate the ST62T15C,T25C device, as well as
the respective ST6215C,25C ROM devices.
OTP and EPROM devices are functionally identi-
cal. The ROM based versions offer the same func-
tionality selecting as ROM options the options de-
fined in the programmable option bytes of the
OTP/EPROM versions.
OTP devices offer all the advantages of user pro-
grammability at low cost, which make them the
ideal choice in a wide range of applications where
frequent code changes, multiple code versions or
last minute programmability are required.
These compact low-cost devices feature a Timer
comprising an 8-bit counter and a 7-bit program-
mable prescaler, an 8-bit A/D Converter with 16
analog inputs and a Digital Watchdog timer, mak-
ing them well suited for a wide range of automo-
tive, appliance and industrial applications.
Figure 1. Block Diagram
TEST
NMI
INTERRUP T
PROGRAM
1836 Bytes
PC
STACK LEVEL 1
STACK LEVEL 2
STACK LEVEL 3
STACK LEVEL 4
STACK LEVEL 5
STACK LEVEL 6
POWER
SUPPLY
OSCILLATOR
RESET
DATA ROM
USER
SELECTAB LE
DATA RAM
64 Bytes
PORT A
PORT B
PORT C
TIMER
DIGITAL
8 BIT CORE
TEST/VPP
3884 Bytes
ST62T15C
ST62T25C, E25C
8-BIT
A/D CONVERTER
PA0..PA 3 (20mA Sink)
PA4..PA 7 / Ain
PB0..P B7 / Ain
PC4..PC7 / Ain
TIMER
VDD VSS OSCin OSCout
RESE T
WATCHDOG
:MEMORY
4


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