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ST62T15C Datenblatt(PDF) 5 Page - STMicroelectronics

Teilenummer ST62T15C
Bauteilbeschribung  8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, OSCILLATOR SAFEGUARD, SAFE RESET AND 28 PINS
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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ST62T15C/T25C/E25C
1.2 PIN DESCRIPTIONS
VDD and VSS. Power is supplied to the MCU via
these two pins. VDD is the power connection and
VSS is the ground connection.
OSCin and OSCout. These pins are internally
connected to the on-chip oscillator circuit. A quartz
crystal, a ceramic resonator or an external clock
signal can be connected between these two pins.
The OSCin pin is the input pin, the OSCout pin is
the output pin.
RESET. The active-low RESET pin is used to re-
start the microcontroller. Internal pull-up is provid-
ed at this pin.
TEST/V
PP. The TEST must be held at VSS for nor-
mal operation. If TEST pin is connected to a
+12.5V level during the reset phase, the EPROM
programming Mode is entered.
NMI. The NMI pin provides the capability for asyn-
chronous interruption, by applying an external non
maskable interrupt to the MCU. The NMI input is
falling edge sensitive. The user can select as op-
tion the availability of an on-chip pull-up at this pin.
TIMER. This is the timer I/O pin. In input mode it is
connected to the prescaler and acts as external
timer clock input or as control gate input for the in-
ternal timer clock. In output mode the timer pin out-
puts the data bit when a time-out occurs. The user
can select as option the availability of an on-chip
pull-up at this pin.
PA0-PA7. These 8 lines are organized as one I/O
port (A). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs. PA0-
PA3 can also sink 20mA for direct LED driving
while PA4-PA7 can be programmed as analog in-
puts for the A/D converter.
PB0-PB7. These 8 lines are organized as one I/O
port (B). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs, or as
analog inputs for the A/D converter.
PC4-PC7. These 4 lines are organized as one I/O
port (C). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs, or as
analog inputs for the A/D converter.
Figure 2. ST62T15C,T25C and E25C Pin
Configuration
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VDD
TIMER
OSCin
OSCout
NMI
VPP/TEST
RESET
Ain/PC7
Ain/PC6
Ain/PC5
VSS
PA0/20mA Sink
PA1/20mA Sink
PA2/20mA Sink
PA3/20mA Sink
PB0/Ain
PB1/Ain
PB2/Ain
PB3/Ain
PB4/Ain
28
27
26
25
24
23
22
21
Ain/PC4
Ain/PB7
Ain/PB6
Ain/PB5
PA4/Ain
PA5/Ain
PA6/Ain
PA7/Ain
5


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