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STLC5460 Datenblatt(PDF) 3 Page - STMicroelectronics

Teile-Nr. STLC5460
Beschreibung  LINE CARD INTERFACE CONTROLLER
Download  54 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC5460 Datenblatt(HTML) 3 Page - STMicroelectronics

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PIN DEFINITIONS AND FUNCTIONS
Symbol
Pin number
Type (*)
Function
VDD1
1
I
Supply Voltage 5V,
±5% .
A0
2
I (**)
Non Multiplexed Mode:
this input interfaces to the system’s address bus to select an internal
register for a read or write access.
Multiplexed Mode:
A0 at VDD, NRDY/NWAIT pin delivers NWAIT
A0 at VSS, NRDY/NWAIT pin delivers NREADY
RxD3
RxD2
RxD1
RxD0
3
4
5
6
I
Receive PCM interface Data : Serial data is received at these lines at
standard TTL or CMOS levels.
A1
7
I (**)
Non Multiplexed Mode:
this input interfaces to the system’s address bus to select an internal
register for a read or write access.
Multiplexed Mode:
A1 at VDD, NCS signal provided by the system is not inverted by the circuit.
A1 at VSS, NCS signal provided by the system is inverted by the circuit.
TSC0
TSC1
TSC2
TSC3
8
10
12
14
OD
Tristate control for the PCM interface. These lines are low when the
corresponding TxD outputs are valid.
TxD0
TxD1
TxD2
TxD3
9
11
13
15
O
Transmit PCM interface Data : Serial data is sent by these lines at standard
TTL or CMOS levels. These pins can be tristated.
PFS
16
I
PCM interface frame synchronization pulse.
PDC
17
I
PCM interface data clock, single or double rate.
A2
18
I (**)
Non Multiplexed Mode:
this input interfaces to the system’s address bus to select an intenal register
for a read or write access.
Multiplexed Mode:
A2 at VDD, AS/ALE signal providedby the system is not inverted by the circuit
A2 at VSS, AS/ALE signal provided by the system is inverted by the circuit
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
19
20
21
22
23
24
25
26
I/O
Address Data Bus. If the multiplexed address/data
µP interface bus mode is
selected these pins transfer data and commands between the
µP and the
STLC5460.
If a demultiplexed mode is used, these bits interface with the system data
bus.
VSS1
27
I
Ground : 0V
DS/NRD
28
I
Motorola like mode: Data Strobe
Intel Like Mode: Not Read
The signal indicates a read operation, active low
RW/NWR
29
I
Motorola like mode: Read/Write
Intel Like Mode: Not Write
The signal indicates a Write operation, active low.
NCS
30
I
Not Chip select. A low on this line selects the STLC5460 for a read/write
operation.
(*): (I) Input
(O) Output
(IO) In/Output
(OD) Open Drain
(**): With Pull up resistance.
STLC5460
3/54


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