Datenblatt-Suchmaschine für elektronische Bauteile |
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74LVX257MTR Datenblatt(PDF) 1 Page - STMicroelectronics |
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74LVX257MTR Datenblatt(HTML) 1 Page - STMicroelectronics |
1 / 13 page 1/13 August 2004 s HIGH SPEED: tPD=5.8ns (TYP.) at VCC = 3.3V s 5V TOLERANT INPUTS s POWER-DOWN PROTECTION ON INPUTS s INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V s LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C s LOW NOISE: VOLP = 0.3V (TYP.) at VCC =3.3V s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) at VCC =3V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LVX257 is a low voltage CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. It is composed of four independent 2-channel multiplexers with common SELECT and ENABLE (OE) INPUT. The 74LVX257 is a non-inverting multiplexer. When the ENABLE INPUT is held "High", all outputs become in high impedance state. If SELECT INPUT is held "Low", "A" data is selected, when SELECT INPUT is "High", "B" data is chosen. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LVX257 LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) WITH 5V TOLERANT INPUTS Figure 1: Pin Connection And IEC Logic Symbols Table 1: Order Codes PACKAGE T & R SOP 74LVX257MTR TSSOP 74LVX257TTR TSSOP SOP Rev. 3 |
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