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74VHC20TTR Datenblatt(PDF) 1 Page - STMicroelectronics

Teilenummer 74VHC20TTR
Bauteilbeschribung  DUAL 4-INPUT NAND GATE
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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74VHC20TTR Datenblatt(HTML) 1 Page - STMicroelectronics

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November 2004
s
HIGH SPEED: tPD = 3.3 ns (TYP.) at VCC = 5V
s
LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s
POWER DOWN PROTECTION ON INPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 20
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHC20 is an advanced high-speed CMOS
DUAL 4-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All
inputs
and
outputs
are
equipped
with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHC20
DUAL 4-INPUT NAND GATE
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
74VHC20MTR
TSSOP
74VHC20TTR
TSSOP
SOP
Rev. 4


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