Datenblatt-Suchmaschine für elektronische Bauteile |
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74VHC240TTR Datenblatt(PDF) 1 Page - STMicroelectronics |
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74VHC240TTR Datenblatt(HTML) 1 Page - STMicroelectronics |
1 / 12 page 1/12 November 2004 s HIGH SPEED: tPD = 3.6ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 240 s IMPROVED LATCH-UP IMMUNITY s LOW NOISE: VOLP = 0.9V (MAX.) DESCRIPTION The 74VHC240 is an advanced high-speed CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. G output enable governs four BUS BUFFERs. This device is designed to be used with 3 state memory address drivers, etc. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74VHC240 OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED) Figure 1: Pin Connection And IEC Logic Symbols Table 1: Order Codes PACKAGE T & R SOP 74VHC240MTR TSSOP 74VHC240TTR TSSOP SOP Rev. 5 |
Ähnliche Teilenummer - 74VHC240TTR |
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Ähnliche Beschreibung - 74VHC240TTR |
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