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STE2002DIE2 Datenblatt(PDF) 9 Page - STMicroelectronics |
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STE2002DIE2 Datenblatt(HTML) 9 Page - STMicroelectronics |
9 / 61 page STE2002 Circuit description 9/61 Figure 3. Bias level generator thus providing an 1/(n+4) ratio, with n calculated from: For m = 81, n = 6 and an 1/10 ratio is set. For m = 65, n =5 and an 1/9 ratio is set. The STE2002 provides three bits (BS0, BS1, BS2) for programming the desired Bias Ratio as shown below: The following table Bias Level for m = 65 and m = 81 are provided: Table 2. Bias ratio programming BS2 BS1 BS0 n 00 07 00 16 01 05 01 14 10 03 10 12 11 01 11 10 Table 3. Bias level Symbol m = 65 (1/9) m = 81 (1/10) V1 VLCD VLCD V2 8/9*VLCD 9/10*VLCD V3 7/9*VLCD 8/10*VLCD V4 2/9*V VLCD 2/10*VLCD V5 1/9 *VLCD 1/10*VLCD V6 VSS VSS R VLCD VSS ·VLCD ·VLCD ·VLCD ·VLCD n + 3 n + 4 R nR R R n + 2 n + 4 2 n + 4 1 n + 4 D00IN1150 m – = |
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