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LC876D08A Datenblatt(PDF) 4 Page - Sanyo Semicon Device |
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LC876D08A Datenblatt(HTML) 4 Page - Sanyo Semicon Device |
4 / 19 page LC876D16A/08A No.A1122-4/19 Multiplication and Division • 16 bits × 8 bits (5 tCYC execution time) • 24 bits × 16 bits (12 tCYC execution time) • 16 bits ÷ 8 bits (8 tCYC execution time) • 24 bits ÷ 16 bits (12 tCYC execution time) Oscillation Circuits • On-chip RC oscillation circuit for system clock use. • On-chip CF oscillation circuit* for system clock use. (Rf built in) • On-chip Crystal oscillation circuit* low speed system clock use. (Rf built in) • Frequency variable RC oscillation circuit (internal) for system clock. 1) Adjustable in ±4% (typ) step from a selected center frequency. 2) Measures oscillation clock using a input signal from XT1 as a reference. * The CF oscillation terminal and the crystal oscillation terminal cannot be used at the same time because of commonness. Standby Function • HALT mode HALT mode is used to reduce power consumption. Program execution is stopped. Peripheral circuits still operate but VFD display and some serial transfer operations stop. 1) Oscillation circuits are not stopped automatically. 2) Release occurs on system reset or by interrupt. • HOLD mode HOLD mode is used to reduce power consumption. Both program execution and peripheral circuits are stopped. 1) The CF, RC, X’tal and frequency variable RC oscillators automatically stop operation. 2) Release occurs on any of the following conditions. (1) input to the reset pin goes “Low” (2) a specified level is input to at least one of INT0, INT1, INT2 (3) an interrupt condition arises at port 0 • X’tal HOLD mode. X’tal HOLD mode is used to reduce power consumption. Program execution is stopped. All peripheral circuits except the base-timer are stopped. 1) The CF, RC, frequency variable RC oscillation circuits stop automatically. 2) Crystal oscillator is maintained in its state at HOLD mode inception. 3) Release occurs on any of the following conditions. (1) input to the reset pin goes “Low” (2) Setting at least one of the INT0, INT1 and INT2 pins to the specified level (3) Having an interrupt source established at port 0 (4) Having an interrupt source established in the base timer circuit (5) Having an interrupt source established in the remote control receiver circuit Package Form • QFP80(14×14): Lead-free type Development Tools • On-chip debugger: TCB87- type-B + LC87F6D64A |
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