TDA7500 datasheet(11/14 Pages) STMICROELECTRONICS

Teilenummer	TDA7500

Bauteilbeschribung	DIGITAL AM/FM SIGNAL PROCESSOR

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Every component hooked up to the I

2C bus has

its own unique address whether it is a CPU,

memory or some other complex function chip.

Each of these chips can act as a receiver and /or

transmitter on its functionality.

General Purpose Input/Output

The DSP requires a set of external general pur-

pose input/output lines, and a reset line. These

signals are used by external devices to signal

events to the DSP. The GPIO lines are imple-

mented as DSP ’s peripherals. The GPIO lines

are grouped in Port A which is connected to DSP

0, and Port B, which is connected to DSP1.

PLL Clock Oscillator

The PLL Clock Oscillator can accept an external

clock at XTI or it can be configured to run an in-

ternal oscillator when a crystal is connected

across pins XTI & XTO. There is an input divide

block IDF (1 -> 32) at the XTI clock input and a

multiply block MF (9 -> 128) in the PLL loop.

Hence the PLL can multiply the external input

clock by a ratio MF/IDF to generate the internal

clock. This allows the internal clock to be within 1

MHz of any desired frequency even when XTI is

much greater than 1 MHz. It is recommended that

the input clock is not divided down to less than 1

MHz as this reduces the Phase Detector’s update

rate.

The clocks to the DSP can be selected to be

either the VCO output divided by 2 to 16, or be

driven by the XTI pin directly.

The crystal oscillator and the PLL will be gated off

when entering the power-down mode (by setting

a register on DSP0).

Codec

The CODEC is composed of four AD mono con-

verters, three DA stereo converters. The ADC

can operate both in audio mode and in FM/AM

mode. When in audio mode, it converts the audio

bandwidth from 20 to 20KHz. The A to D is a third

order Sigma-Delta converter, the converter reso-

lutions is 20 bit with 93 dB of dynamic range and

85dB of total harmonic distortion. When in FM

mode, the converted bandwidth is up to 192KHz.

The D to A is a third order Sigma-Delta converter

with a low noise reconstructing analog filter, the

converter resolution is 20 bit with 93 dB of dy-

namic range and 85dB of total harmonic distor-

tion. All the reference voltages are generated in-

side the chip.

Some capabilities of the CODEC are listed below:

20-Bit Resolution

Digital Anti-Alias Filtering embedded

Adjustable System Sampling Rates

93dB D/A Dynamic Range (A-Weighted)

93dB A/D Dynamic Range (A-Weighted)

85dB D/A (THD+N/S)

85dB A/D (THD+N/S)

Internal Differential Analog Architecture

+3.3V Power Supply

SOFTWARE FEATURES

A great flexibility is guaranteed by the two program-

mable DSP cores. A list of the main software func-

tions which can be implemented in the TDA7500 is

enclosed hereafter. A block diagram of the audio

processing flow is shown in Fig. 1 below.

AM/FM Baseband Signal Processing

FM weak signal processing

Integrated 19 kHz MPX filter and deemphasis

flexible noise cancellation

flexible multipath detector

Generic Audio Signal Processsing

Loudness

Bass, treble, fader control

Volume control

Distortion Limiting

Premium Equalization

Soft mute

TAPE Signal Processsing

Dolby B Noise Reduction

Automatic Music Search

CD Signal Proceessing

Dynamic Range Compression

Audiophile (optional)

Parametric Equalization

Crossover Patters

Channel Delays

Center Channel Imaging Output

Audio Noise Reduction

Application Scheme

The TDA7500 can operate as a standalone de-

vice either it can interface the TDA7501 which

contains the analog input multiplexer, analog vol-

ume control and the line-driver. The FM_MPX

and FM_LEVEL signals coming from the tuner

and other signals supplied by analog sources are

adapted by the TDA7501 and fed to the

TDA7500. A block diagram of the system is

shown in Fig.2 below.

The TDA7500 converts all the analog signals into

TDA7500

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