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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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TDA9115 Datenblatt(PDF) 10 Page - STMicroelectronics |
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TDA9115 Datenblatt(HTML) 10 Page - STMicroelectronics |
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10 / 45 page  TDA9115 10/45 Note 1: Frequency at no sync signal condition. For correct operation, the frequency of the sync signal applied must always be higher than the free-running frequency. The application must consider the spread of values of real electrical components in RRO and CCO positions so as to always meet this condition. The formula to calculate the free-running frequency is fHO(0)=0.12125/(RRO CCO) Note 2: Base of NPN transistor with emitter to ground is internally connected on pin HFly through a series resistance of about 500 Ω and a resistance to ground of about 20kΩ. Note 3: Evaluated and figured out during the device qualification phase. Informative. Not tested on every single unit. Note 4: This capture range can be enlarged by external circuitry. Note 5: The voltage on HPLL2C pin corresponds to immediate phase of leading edge of H-drive signal on HOut pin with respect to internal horizontal oscillator sawtooth. It must be between the two clamping levels given. Voltage equal to one of the clamping values indicates a marginal operation of PLL2 or non-locked state. Note 6: Internal threshold. See Figure 7. Note 7: The tph(min)/TH parameter is fixed by the application. For correct operation of asymmetry corrections through dynamic phase modulation, this minimum must be increased by maximum of the total dynamic phase required in the direction leading to bending of corners to the left. Marginal situation is indicated by reach of VTopHPLL2C high clamping level by waveform on pin HPLL2C. Also refer to Note 5 and Figure 7. Note 8: The tph(max)/TH parameter is fixed by the application. For correct operation of asymmetry corrections through dynamic phase modulation, this maximum must be reduced by maximum of the total dynamic phase required in the direction leading to bending of corners to the right. Marginal situation is indicated by reach of VBotHPLL2C low clamping level by waveform on pin HPLL2C. Also refer to Note 5 and Figure 7 . Note 9: All other dynamic phase corrections of picture asymmetry set to their neutral (medium) positions. tPCAC/TH Contribution of pin cushion asymmetry correction to phase of H-drive vs. static phase (via PLL2), measured in corners (9 PCAC (Sad11h) full span VPOS at medium VSIZE at minimum VSIZE at medium VSIZE at maximum ±1.0 ±1.8 ±2.8 % % % tParalC/TH Contribution of parallelogram correction to phase of H-drive vs. static phase (via PLL2), measured in corners (9) PARAL (Sad12h) full span VPOS at medium VSIZE at minimum VSIZE at medium VSIZE at maximum VPOS at max. or min. VSIZE at minimum ±1.75 ±2.2 ±2.8 ±1.75 % % % % Symbol Parameter Test Condit ions Value Units Min. Typ. Max. |
Ähnliche Teilenummer - TDA9115 |
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Ähnliche Beschreibung - TDA9115 |
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