Datenblatt-Suchmaschine für elektronische Bauteile |
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MC13202FC Datenblatt(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC13202FC Datenblatt(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 30 page MC13202 Technical Data, Rev. 1.5 Freescale Semiconductor 11 Figure 6 shows an RF parameter evaluation circuit. Figure 6. RF Parametric Evaluation Circuit Table 6. Digital Timing Specifications (VBATT, VDDINT = 2.7 V, TA = 25 °C, frequency = 16 MHz, unless otherwise noted. SPI timing parameters are referenced to Figure 8. Symbol Parameter Min Typ Max Unit T0 SPICLK period 125 nS T1 Pulse width, SPICLK low 50 nS T2 Pulse width, SPICLK high 50 nS T3 Delay time, MISO data valid from falling SPICLK 15 nS T4 Setup time, CE low to rising SPICLK 15 nS T5 Delay time, MISO valid from CE low 15 nS T6 Setup time, MOSI valid to rising SPICLK 15 nS T7 Hold time, MOSI valid from rising SPICLK 15 nS RST minimum pulse width low (asserted) 250 nS Table 7. RF Port Impedance Characteristic Symbol Typ Unit RFIN Pins for internal T/R switch configuration, TX mode 2.405 GHz 2.442 GHz 2.480 GHz Zin 16.1 - j126 16.0 – j123 15.8 – j121 Ω RFIN Pins for internal or external T/R switch configuration, RX mode 2.405 GHz 2.442 GHz 2.480 GHz Zin 14.4 – j77.2 14.5 – j74.8 14.6 – j72.5 Ω PAO Pins for external T/R switch configuration, TX mode 2.405 GHz 2.442 GHz 2.480 GHz Zin 18.5 – j148 18.3 – j146 18.2 – j143 Ω 5 1 6 2 3 4 Z4 LDB212G4005C-001 L10 4.7nH L11 4.7nH C12 10pF VDDA VDD 6 IN 5 VCONT 4 OUT1 1 OUT2 3 GND 2 IC2 µPG2012TK-E2 C13 10pF C14 10pF 5 1 6 2 3 4 Z5 LDB212G4005C-001 L12 2.2nH C15 1.8pF 2 5 3 4 J3 SMA_edge_Receptacle_Female L13 3.3nH L14 3.3nH C16 10pF C17 1.0pF C18 1.8pF GPIO1 44 PAO_M 39 PAO_P 38 RFIN_P 36 RFIN_M 35 CT_Bias 34 U4 MC1320x |
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