ADM1491E

Rev. 0 | Page 6 of 16

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

NC

1

RO

2

RE

3

DE

4

14

13

A

12

B

11

DI

5

Z

10

Y

9

NC

8

NC = NO CONNECT

ADM1491E

TOP VIEW

(Not to Scale)

ADM1491E

TOP VIEW

(Not to Scale)

Figure 6. 14-Lead Narrow-Body SOIC Pin Configuration

RO

1

RE

2

DE

3

DI

4

GND

5

10

A

9

B

8

Z

7

Y

6

Figure 7. 10-Lead MSOP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

14-Lead SOIC

Mnemonic

Description

10-Lead MSOP

1

N/A1

NC

No Connect. This pin is available on the 14-lead SOIC only.

2

1

RO

Receiver Output.

3

2

RE

Receiver Output Enable. A low level enables the receiver output, whereas a high level

places the receiver output in a high impedance state.

4

3

DE

Driver Output Enable. A high level enables the differential driver outputs, A and B,

whereas a low places the differential driver outputs in a high impedance state.

5

4

DI

Driver Input. When the driver is enabled, a logic low on DI forces A low and B high,

whereas logic high on DI forces A high and B low.

6

5

GND

Ground.

7

N/A1

GND

Ground. This pin is available on the 14-lead SOIC only.

8

N/A1

NC

No Connect. This pin is available on the 14-lead SOIC only.

9

6

Y

Noninverting Driver Output Y.

10

7

Z

Inverting Driver Output Z.

11

8

B

Inverting Receiver Input B.

12

9

A

Noninverting Receiver Input A.

13

10

Power Supply (5 V ± 5%).

14

N/A1

Power Supply (5 V ± 5%). This pin is available on the 14-lead SOIC only.