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CS42888-DQZ Datenblatt(PDF) 4 Page - Cirrus Logic |
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CS42888-DQZ Datenblatt(HTML) 4 Page - Cirrus Logic |
4 / 61 page 4 DS717F2 CS42888 7.1.2 Passive Input Filter w/Attenuation ......................................................................................... 52 7.2 DAC Output Filter ........................................................................................................................... 53 8. ADC FILTER PLOTS ............................................................................................................................ 54 9. DAC FILTER PLOTS ............................................................................................................................ 56 10. PARAMETER DEFINITIONS .............................................................................................................. 58 11. REFERENCES .................................................................................................................................... 59 12. PACKAGE INFORMATION ................................................................................................................ 60 12.1 Thermal Characteristics ............................................................................................................... 60 13. ORDERING INFORMATION .............................................................................................................. 61 14. REVISION HISTORY .......................................................................................................................... 61 LIST OF FIGURES Figure 1.Typical Connection Diagram ......................................................................................................... 9 Figure 2.Output Test Circuit for Maximum Load ....................................................................................... 16 Figure 3.Maximum Loading ....................................................................................................................... 16 Figure 4.Serial Audio Interface Slave Mode Timing .................................................................................. 18 Figure 5.TDM Serial Audio Interface Timing ............................................................................................. 18 Figure 6.Serial Audio Interface Master Mode Timing ................................................................................ 19 Figure 7.Serial Audio Interface Slave Mode Timing .................................................................................. 20 Figure 8.Control Port Timing - I²C Format ................................................................................................. 21 Figure 9.Control Port Timing - SPI Format ................................................................................................ 22 Figure 10.Full-Scale Input ......................................................................................................................... 25 Figure 11.Audio Output Initialization Flow Chart ....................................................................................... 26 Figure 12.Full-Scale Output ...................................................................................................................... 28 Figure 13.De-Emphasis Curve .................................................................................................................. 29 Figure 14.I²S Format ................................................................................................................................. 31 Figure 15.Left-Justified Format ................................................................................................................. 31 Figure 16.Right-Justified Format ............................................................................................................... 31 Figure 17.One-Line Mode #1 Format ........................................................................................................ 31 Figure 18.One-Line Mode #2 Format ........................................................................................................ 32 Figure 19.TDM Format .............................................................................................................................. 32 Figure 20.AUX I²S Format ......................................................................................................................... 33 Figure 21.AUX Left-Justified Format ......................................................................................................... 33 Figure 22.Control Port Timing in SPI Mode .............................................................................................. 34 Figure 23.Control Port Timing, I²C Write ................................................................................................... 35 Figure 24.Control Port Timing, I²C Read ................................................................................................... 35 Figure 25.Single-to-Differential Active Input Filter ..................................................................................... 51 Figure 26.Single-Ended Active Input Filter ................................................................................................ 51 Figure 27.Passive Input Filter ................................................................................................................... 52 Figure 28.Passive Input Filter w/Attenuation ............................................................................................. 52 Figure 29.Active Analog Output Filter ....................................................................................................... 53 Figure 30.Passive Analog Output Filter .................................................................................................... 53 Figure 31.SSM Stopband Rejection .......................................................................................................... 54 Figure 32.SSM Transition Band ................................................................................................................ 54 Figure 33.SSM Transition Band (Detail) ................................................................................................... 54 Figure 34.SSM Passband Ripple .............................................................................................................. 54 Figure 35.DSM Stopband Rejection .......................................................................................................... 54 Figure 36.DSM Transition Band ................................................................................................................ 54 Figure 37.DSM Transition Band (Detail) ................................................................................................... 55 Figure 38.DSM Passband Ripple .............................................................................................................. 55 Figure 39.QSM Stopband Rejection ......................................................................................................... 55 Figure 40.QSM Transition Band ................................................................................................................ 55 Figure 41.QSM Transition Band (Detail) ................................................................................................... 55 |
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