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TC850CPL Datenblatt(PDF) 8 Page - TelCom Semiconductor, Inc |
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TC850CPL Datenblatt(HTML) 8 Page - TelCom Semiconductor, Inc |
8 / 14 page 3-84 TELCOM SEMICONDUCTOR, INC. 15-BIT, FAST-INTEGRATING CMOS ANALOG-TO-DIGITAL CONVERTER TC850 Figure 5. Bus Interface Simplified Schematic Differential Reference (VREF) The TC850 requires two reference voltage sources in order to generate the "fast-slow" deintegrate phases. The main voltage reference (VREF1) is applied between the REF1 + and REF – pins. The secondary reference (VREF2) is applied between the REF2 + and REF – pins. The reference voltage inputs are fully differential, and the reference voltage can be generated anywhere within the power supply voltage of the converter. However, to minimize roll-over error, especially at high conversion rates, keep the reference common-mode voltage (i.e., REF –) near or at the analog common potential. All voltage reference inputs are high impedance. Average reference input current is typically only 30pA. Analog Common (COMMON) Analog common is used as the IN– return during the zero-integrator and deintegrate phases of each conversion. If IN– is at a different potential than analog common, a common-mode voltage exists in the system. This signal is rejected by the 86 dB CMRR of the converter. However, in most applications, IN– will be set at a fixed, known voltage (power supply common, for instance). In this case, analog common should be tied to the same point so that the common-mode voltage is eliminated. RD L/H 3-STATE BUFFER OUTPUT ENABLE END OF CONVERSION CONT/ DEMAND START CONVERSION TO A/D CONTROL LOGIC OCTAL 2-INPUT MUX SELECT LOW-BYTE UP/DOWN COUNTER HIGH-BYTE UP/DOWN COUNTER POLARITY OVERANGE TC850 8 SELECT 2-INPUT MUX DBO–DB7 8 7 8 CE CS WR POL/OVR DIGITAL SECTION DESCRIPTION The TC850 digital section consists of two sets of conver- sion counters, control and sequencing logic, clock oscillator and divider, data latches, and an 8-bit, 3-state interface bus. A simplified schematic of the bus interface logic is shown in Figure 5. Clock Oscillator The TC850 includes a crystal oscillator on-chip. All that is required is to connect a crystal across OSC1 and OSC2 pins, and to add two inexpensive capacitors (Figure 1). The oscillator output is ÷ 4 prior to clocking the A/D internal counters. For example, a 100kHz crystal produces a system clock frequency of 25kHz. Since each conversion requires 1280 clock periods, in this case the conversion rate will be 25,000/1280, or 19.5 conversions per second. In most applications, however, an external clock is divided down from the microprocessor clock. In this case, the OSC1 pin is used as the external oscillator input and OSC2 is left unconnected. The external clock driver should swing from digital ground to VDD. The ÷4 function is active for both external clock and crystal oscillator operations. |
Ähnliche Teilenummer - TC850CPL |
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Ähnliche Beschreibung - TC850CPL |
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