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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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LFDW Datenblatt(PDF) 11 Page - Linear Technology |
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LFDW Datenblatt(HTML) 11 Page - Linear Technology |
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11 / 24 page  LT3682 11 3682f FB Resistor Network The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the resistor values according to: RR V V OUT 12 0 8 1 =− ⎛ ⎝⎜ ⎞ ⎠⎟ . Reference designators refer to the Block Diagram. 1% resistors are recommended to maintain output voltage accuracy. Setting the Switching Frequency The LT3682 uses a constant frequency PWM architecture that can be programmed to switch from 250kHz to 2.2MHz by using a resistor tied from the RT pin to ground. A table showing the necessary RT value for a desired switching frequency is in Figure 1. SWITCHING FREQUENCY (MHz) RT VALUE (kΩ) 0.25 158 0.3 127 0.4 90.9 0.5 71.5 0.6 57.6 0.7 47.5 0.8 40.2 0.9 34 1.0 29.4 1.2 22.6 1.4 18.2 1.6 14.7 1.8 12.1 2.0 9.76 2.2 8.06 Figure 1. Switching Frequency vs. RT Value Operating Frequency Tradeoffs Selection of the operating frequency is a tradeoff between efficiency, component size, minimum dropout voltage, and maximum input voltage. The advantage of high frequency operation is that smaller inductor and capacitor values may be used. The disadvantages are lower efficiency, lower maximum input voltage, and higher dropout voltage. The highest acceptable switching frequency (fSW(MAX)) for a given application can be calculated as follows: f VV tV V V SW MAX OUT D ON MIN IN SW D () ()() = + −+ where VIN is the typical input voltage, VOUT is the output voltage, VD is the catch diode drop (~0.5V) and VSW is the internal switch drop (~0.5V at max load). This equation shows that slower switching frequency is necessary to safely accommodate high VIN/VOUT ratio. Also, as shown in the Input Voltage Range section, lower frequency allows a lower dropout voltage. Input voltage range depends on the switching frequency because the LT3682 switch has finite minimum on and off times. An internal timer forces the switch to be off for at least tOFF(MIN) per cycle; This timer has a maximum value of 210ns over temp. On the other hand, delays associated with turning off the power switch dictate the minimum on time tON(MIN) before the switch can be turned off; tON(MIN) has a maximum value of 150ns over temp. The minimum and maximum duty cycles that can be achieved taking minimum on and off times into account are: DC f t DC f t MIN SW ON MIN MAX SW OFF MIN = =− () () 1 where fSW is the switching frequency, the tON(MIN) is the minimum switch on time (150ns), and the tOFF(MIN) is the minimum switch off time (210ns). These equations show that duty cycle range increases when switching frequency is decreased. Agoodchoiceofswitchingfrequencyshouldallowadequate input voltage range (see Input Voltage Range section) and keep the inductor and capacitor values small. Input Voltage Range The minimum input voltage is determined by either the LT3682’s minimum operating voltage of ~3.6V (VBD > 3V) or by its maximum duty cycle (see equation in Operating APPLICATIONS INFORMATION |
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