Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

CDC2510 Datenblatt(PDF) 3 Page - Texas Instruments

Teilenummer CDC2510
Bauteilbeschribung  3.3-V PHASE-LOCK LOOP CLOCK DRIVER
Download  9 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CDC2510 Datenblatt(HTML) 3 Page - Texas Instruments

  CDC2510 Datasheet HTML 1Page - Texas Instruments CDC2510 Datasheet HTML 2Page - Texas Instruments CDC2510 Datasheet HTML 3Page - Texas Instruments CDC2510 Datasheet HTML 4Page - Texas Instruments CDC2510 Datasheet HTML 5Page - Texas Instruments CDC2510 Datasheet HTML 6Page - Texas Instruments CDC2510 Datasheet HTML 7Page - Texas Instruments CDC2510 Datasheet HTML 8Page - Texas Instruments CDC2510 Datasheet HTML 9Page - Texas Instruments  
Zoom Inzoom in Zoom Outzoom out
 3 / 9 page
background image
CDC2510
3.3-V PHASE-LOCK LOOP CLOCK DRIVER
SCAS597 – DECEMBER 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
TYPE
DESCRIPTION
NAME
NO.
TYPE
DESCRIPTION
CLK
24
I
Clock input. CLK provides the clock signal to be distributed by the CDC2510 clock driver. CLK is used
to provide the reference signal to the integrated PLL that generates the clock output signals. CLK must
have a fixed frequency and fixed phase for the PLL to obtain phase lock. Once the circuit is powered
up and a valid CLK signal is applied, a stabilization time is required for the PLL to phase lock the
feedback signal to its reference signal.
FBIN
13
I
Feedback input. FBIN provides the feedback signal to the internal PLL. FBIN must be hard-wired to
FBOUT to complete the PLL. The integrated PLL synchronizes CLK and FBIN so that there is
nominally zero phase error between CLK and FBIN.
G
11
I
Output bank enable. G is the output enable for outputs 1Y(0:9). When G is low, outputs 1Y(0:9) are
disabled to a logic-low state. When G is high, all outputs 1Y(0:9) are enabled and switch at the same
frequency as CLK.
FBOUT
12
O
Feedback output. FBOUT is dedicated for external feedback. It switches at the same frequency as
CLK. When externally wired to FBIN, FBOUT completes the feedback loop of the PLL. FBOUT has
and integrated 25-
Ω series-damping resistor.
1Y (0:9)
3, 4, 5, 8, 9
15, 16, 17, 20,
21
O
Clock outputs. These outputs provide low-skew copies of CLK. Output bank 1Y(0:9) is enabled via
the G input. These outputs can be disabled to a logic-low state by deasserting the G control input.
Each output has an integrated 25-
Ω series-damping resistor.
AVCC
23
Power
Analog power supply. AVCC provides the power reference for the analog circuitry. In addition, AVCC
can be used to bypass the PLL for test purposes. When AVCC is strapped to ground, PLL is bypassed
and CLK is buffered directly to the device outputs.
AGND
1
Ground
Analog ground. AGND provides the ground reference for the analog circuitry.
VCC
2, 10, 14, 22
Power
Power supply
GND
6, 7, 18, 19
Ground
Ground


Ähnliche Teilenummer - CDC2510

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
Texas Instruments
CDC2510 TI1-CDC2510 Datasheet
608Kb / 13P
[Old version datasheet]   3.3V Phase-Lock Loop Clock Driver
CDC2510A TI-CDC2510A Datasheet
308Kb / 13P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDC2510APWR TI-CDC2510APWR Datasheet
308Kb / 13P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDC2510APWRG4 TI-CDC2510APWRG4 Datasheet
308Kb / 13P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDC2510B TI-CDC2510B Datasheet
146Kb / 10P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
More results

Ähnliche Beschreibung - CDC2510

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
Hitachi Semiconductor
HD74CDC2510B HITACHI-HD74CDC2510B Datasheet
45Kb / 11P
   3.3-V Phase-lock Loop Clock Driver
logo
Texas Instruments
CDCF2509 TI1-CDCF2509_17 Datasheet
641Kb / 15P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDCVF2505 TI-CDCVF2505 Datasheet
207Kb / 10P
[Old version datasheet]   3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER
CDC2509 TI-CDC2509 Datasheet
132Kb / 9P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDC2509C TI-CDC2509C Datasheet
180Kb / 12P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDC2510B TI-CDC2510B Datasheet
146Kb / 10P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDC2510C TI-CDC2510C Datasheet
180Kb / 12P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDC509 TI1-CDC509_15 Datasheet
612Kb / 13P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
logo
Hitachi Semiconductor
HD74CDC2509B HITACHI-HD74CDC2509B Datasheet
42Kb / 11P
   3.3-V Phase-lock Loop Clock Driver
logo
Texas Instruments
CDC2509B TI-CDC2509B Datasheet
147Kb / 10P
[Old version datasheet]   3.3-V PHASE-LOCK LOOP CLOCK DRIVER
More results


Html Pages

1 2 3 4 5 6 7 8 9


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com