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SN74ABT273DWE4 Datenblatt(PDF) 2 Page - Texas Instruments

Teilenummer SN74ABT273DWE4
Bauteilbeschribung  OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR
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Hersteller  TI [Texas Instruments]
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SN74ABT273DWE4 Datenblatt(HTML) 2 Page - Texas Instruments

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SN54ABT273, SN74ABT273
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR
SCBS185B – FEBRUARY 1991 – REVISED JANUARY 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic symbol
1D
3
1D
4
2D
7
3D
R
1
1Q
2
2Q
5
3Q
6
8
4D
13
5D
14
6D
4Q
9
5Q
12
6Q
15
CLR
17
7D
18
8D
11
CLK
7Q
16
8Q
19
C1
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
CLK
1D
3
1D
C1
R
1Q
2
2D
4
1D
C1
R
2Q
5
3D
7
1D
C1
R
3Q
6
4D
8
1D
C1
R
4Q
9
5D
13
1D
C1
R
5Q
12
6D
14
1D
C1
R
6Q
15
7D
17
1D
C1
R
7Q
16
8D
18
1D
C1
R
8Q
19
CLR
11
1
CLK(I)
R
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, VO
–0.5 V to 5.5 V
. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO: SN54ABT273
96 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABT273
128 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
–18 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0)
–50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): DB package
115
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package
97
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
67
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
128
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.


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