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SN74ABT8996DW Datenblatt(PDF) 7 Page - Texas Instruments |
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SN74ABT8996DW Datenblatt(HTML) 7 Page - Texas Instruments |
7 / 40 page SN54ABT8996, SN74ABT8996 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS SCBS489C – AUGUST 1994 – REVISED APRIL 1999 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 shadow protocol Addressing of an ASP in system is accomplished by shadow protocols, which are received at PTDI synchronously to PTCK. Shadow protocols can occur only in the following stable TAP states: Test-Logic-Reset, Run-Test/Idle, Pause-DR, and Pause-IR. Shadow protocols never occur in Shift-DR or Shift-IR states in order to prevent contention on the signal bus to which PTDO is wired. Additionally, the ASP PTMS must be held at a constant low or high level throughout a shadow protocol. If TAP-state changes occur in the midst of a shadow protocol, the shadow protocol is aborted and the select-protocol state machine returns to its initial state. The shadow protocol is based on a serial bit-pair signaling scheme in which two bit-pair combinations (data one, data zero) are used to represent address data and the other two bit-pair combinations (select, idle) are used for framing – that is, to indicate where address data begins and ends. These bit pairs are received serially at PTDI (or transmitted serially at PTDO) synchronously to PTCK as follows: – The idle bit pair (I) is represented as two consecutive high signals. – The select bit pair (S) is represented as two consecutive low signals. – The data-one bit pair (D) is represented as a low signal followed by a high signal. – The data-zero bit pair (D) is represented as a high signal followed by a low signal. PTCK PTDI or PTDO First Bit of Pair Is Transmitted First Bit of Pair Is Received Second Bit of Pair Is Transmitted Second Bit of Pair Is Received Figure 3. Bit-Pair Timing (Data Zero Shown) A complete shadow protocol is composed of the receipt of a select protocol followed, if applicable, by the transmission of an acknowledge protocol (which is issued from PTDO only if the received address matches that at the A9–A0 inputs). Both of these subprotocols are composed of ten data bit pairs framed at the beginning by idle and select bit pairs and at the end by select and idle bit pairs. This is represented in an abbreviated fashion as follows: ISDDDDDDDDDDSI. Figure 4 shows a complete shadow protocol (the symbol T is used to represent a high-impedance condition on the associated signal line – since the high-impedance state at PTDI is logically high due to pullup, it maps onto the idle bit pair). T I S D D D D D D D D D D S I T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T I S D D D D D D D D D D S I T Received at PTDI Transmitted at PTDO Primary Tap Is Inactive Select Protocol Begins Select Protocol Ends Acknowledge Protocol Begins Acknowledge Protocol Ends Primary-to-Secondary Connect, Scan Operations Can Be Initiated LSB MSB LSB MSB Figure 4. Complete Shadow Protocol |
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