SN54GTL16616, SN74GTL16616

17-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS

WITH BUFFERED CLOCK OUTPUTS

SCBS481F – JUNE 1994 – REVISED NOVEMBER 1999

2

POST OFFICE BOX 655303

description (continued)

Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),

and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CEAB and CEBA)

inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is

low, the A data is latched if CEAB is low and CLKAB is held at a high or low logic level. If LEAB is low, the A-bus

data is stored in the latch/flip-flop on the low-to-high transition of CLKAB if CEAB also is low. When OEAB is

low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for B

to A is similar to that of A to B, but uses OEBA, LEBA, CLKBA, and CEBA.

outputs, preventing damaging current backflow through the device when it is powered down.

Active bus-hold circuitry holds unused or undriven LVTTL inputs at a valid logic state. Use of pullup or pulldown

resistors with the bus-hold circuitry is not recommended.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54GTL16616 is characterized for operation over the full military temperature range of –55

°C to 125°C.

The SN74GTL16616 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE†

INPUTS

OUTPUT

MODE

CEAB

OEAB

LEAB

CLKAB

A

B

MODE

X

H

X

X

X

Z

Isolation

L

L

L

H or L

X

B0‡

Latched storage of A data

L

L

L

H or L

X

B0§

Latched storage of A data

X

L

H

X

L

L

Transparent

X

LH

X

H

H

Transparent

L

L

L

↑

L

L

Clocked storage of A data

L

LL

↑

HH

Clocked storage of A data

H

L

L

X

X

B0§

Clock inhibit

† A-to-B data flow is shown. B-to-A data flow is similar, but uses OEBA, LEBA, CLKBA,

and CEBA.

‡ Output level before the indicated steady-state input conditions were established, provided

that CLKAB was high before LEAB went low

§ Output level before the indicated steady-state input conditions were established