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SN74ALVCH16721 Datenblatt(PDF) 1 Page - Texas Instruments

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Teilenummer SN74ALVCH16721
Bauteilbeschribung  3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
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SN74ALVCH16721
3.3-V 20-BIT FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES052D – JULY 1995 – REVISED FEBRUARY 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus
™ Family
D EPIC ™ (Enhanced-Performance Implanted
CMOS) Submicron Process
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages
description
This 20-bit flip-flop is designed specifically for
1.65-V to 3.6-V VCC operation.
The 20 flip-flops of the SN74ALVCH16721 are
edge-triggered D-type flip-flops with qualified
clock storage. On the positive transition of the
clock (CLK) input, the device provides true data at
the Q outputs if the clock-enable (CLKEN) input is
low. If CLKEN is high, no data is stored.
A buffered output-enable (OE) input places the
20 outputs in either a normal logic state (high or
low)
or
the
high-impedance
state. In
the
high-impedance state, the outputs neither load
nor
drive
the
bus
lines
significantly.
The
high-impedance
state
and
increased
drive
provide the capability to drive bus lines without
need for interface or pullup components. OE does
not affect the internal operation of the flip-flops.
Old data can be retained or new data can be
entered
while
the
outputs
are
in
the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16721 is characterized for operation from –40
°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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OE
Q1
Q2
GND
Q3
Q4
VCC
Q5
Q6
Q7
GND
Q8
Q9
Q10
Q11
Q12
Q13
GND
Q14
Q15
Q16
VCC
Q17
Q18
GND
Q19
Q20
NC
CLK
D1
D2
GND
D3
D4
VCC
D5
D6
D7
GND
D8
D9
D10
D11
D12
D13
GND
D14
D15
D16
VCC
D17
D18
GND
D19
D20
CLKEN
NC – No internal connection
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
© 1999, Texas Instruments Incorporated
EPIC and Widebus are trademarks of Texas Instruments Incorporated.


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