Datenblatt-Suchmaschine für elektronische Bauteile |
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SN74ALVCH16903DL Datenblatt(PDF) 2 Page - Texas Instruments |
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SN74ALVCH16903DL Datenblatt(HTML) 2 Page - Texas Instruments |
2 / 12 page SN74ALVCH16903 3.3-V 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER AND DUAL 3-STATE OUTPUTS SCES095C – MARCH 1997 – REVISED MAY 1998 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) OE does not affect the internal operation of the device. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH16903 is characterized for operation from 0 °C to 70°C. Function Tables FUNCTION INPUTS OUTPUTS OE MODE CLKEN CLK A 1Yn† – 8Yn† 9Yn† – 12Yn† L L L ↑ H H H L LL ↑ LL L L LH ↑ HY0 H L LH ↑ LY0 L L HX X H H H L HX X L L L H X X X X Z Z † n = 1, 2 PARITY FUNCTION INPUTS OUTPUT OE PAROE‡ 11A/YERREN§ PARI/O Σ OF INPUTS 1A – 10A = H APAR OUTPUT YERR L H L L 0, 2, 4, 6, 8, 10 L H L H L L 1, 3, 5, 7, 9 L L L H L L 0, 2, 4, 6, 8, 10 H L L H L L 1, 3, 5, 7, 9 H H L H L H 0, 2, 4, 6, 8, 10 L L L H L H 1, 3, 5, 7, 9 L H L H L H 0, 2, 4, 6, 8, 10 H H L H L H 1, 3, 5, 7, 9 H L H X X X X X H L X H X X X H ‡ When used as a single device, PAROE must be tied high. § Valid after appropriate number of clock pulses have set internal register |
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Ähnliche Beschreibung - SN74ALVCH16903DL |
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