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AD5750ACPZ-REEL7 Datenblatt(PDF) 7 Page - Analog Devices |
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AD5750ACPZ-REEL7 Datenblatt(HTML) 7 Page - Analog Devices |
7 / 36 page AD5750/AD5750-1 Rev. A | Page 7 of 36 Parameter1 Min Typ Max Unit Test Conditions/Comments DIGITAL INPUT JEDEC compliant Input High Voltage, VIH 2 V Input Low Voltage, VIL 0.8 V Input Current −1 +1 μA Per pin Pin Capacitance 5 pF Per pin DIGITAL OUTPUTS3 FAULT, IFAULT, TEMP, VFAULT Output Low Voltage, VOL 0.4 V 10 kΩ pull-up resistor to DVCC 0.6 V @ 2.5 mA Output High Voltage, VOH 3.6 V 10 kΩ pull-up resistor to DVCC SDO Output Low Voltage, VOL 0.5 0.5 V Sinking 200 μA Output High Voltage, VOH DVCC − 0.5 DVCC − 0.5 V Sourcing 200 μA High Impedance Output Capacitance 3 pF High Impedance Leakage Current −1 +1 μA POWER REQUIREMENTS AVDD 12 24 V ±10% AVSS −12 −24 V ±10% DVCC Input Voltage 2.7 5.5 V AIDD 4.4 5.2 mA Output unloaded, output disabled 5.2 6.2 mA Current output enabled 5.2 6.2 mA Voltage output enabled AISS 2.0 2.5 mA Output unloaded, output disabled 2.5 3 mA Current output enabled 2.5 3 mA Voltage output enabled DICC 0.3 1 mA VIH = DVCC, VIL = GND Power Dissipation 108 mW AVDD/AVSS = ±24 V, outputs unloaded 1 Temperature range: −40°C to +105°C; typical at +25°C. 2 Specification includes gain and offset errors over temperature, and drift after 1000 hours, TA = 125°C 3 Guaranteed by characterization, but not production tested. |
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Ähnliche Beschreibung - AD5750ACPZ-REEL7 |
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