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ADN2872ACPZ-RL Datenblatt(PDF) 6 Page - Analog Devices

Teilenummer ADN2872ACPZ-RL
Bauteilbeschribung  3.3 V Dual-Loop, 50 Mbps to 3.3 Gbps Laser Diode Driver
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ADN2872ACPZ-RL Datenblatt(HTML) 6 Page - Analog Devices

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ADN2872
Rev. 0 | Page 6 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
19
24
18
1
12
7
13
6
FAIL
IBMON
ERREF
IMMON
ERSET
VCC
CCBIAS
PAVSET
VCC
PAVREF
RPAV
GND
ADN2872
TOP VIEW
(Not to Scale)
NOTES
1. THE LFCSP PACKAGE HAS AN EXPOSED PADDLE THAT
MUST BE CONNECTED TO GROUND.
Figure 5. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
CCBIAS
Control Output Current.
2
PAVSET
Average Optical Power Set Pin.
3
GND
Supply Ground.
4
VCC
Supply Voltage.
5
PAVREF
Reference Voltage Input for Average Optical Power Control.
6
RPAV
Average Power Resistor when Using PAVREF.
7
ERCAP
Extinction Ratio Loop Capacitor.
8
PAVCAP
Average Power Loop Capacitor.
9
GND
Supply Ground.
10
DATAP
Data, Positive Differential Input.
11
DATAN
Data, Negative Differential Input.
12
ALS
Automatic Laser Shutdown.
13
ERSET
Extinction Ratio Set Pin.
14
IMMON
Modulation Current Monitor Current Source.
15
ERREF
Reference Voltage Input for Extinction Ratio Control.
16
VCC
Supply Voltage.
17
IBMON
Bias Current Monitor Current Source.
18
FAIL
FAIL Alarm Output.
19
GND
Supply Ground.
20
VCC
Supply Voltage.
21
IMODP
Modulation Current Positive Output (Current Sink), Connect to Laser Diode.
22
IMODN
Modulation Current Negative Output (Current Sink).
23
GND
Supply Ground.
24
IBIAS
Laser Diode Bias (Current Sink to Ground).
25 (EPAD)
Exposed Paddle (EPAD)
The LFCSP package has an exposed paddle that must be connected to ground.


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