74HC125

http://onsemi.com

4

Symbol

Parameter

(V)

Guaranteed Limit

Unit

– 55 to

25_C

v 85_C

v 125_C

Maximum Propagation Delay, Input A to Output Y

(Figures 1 and 3)

2.0

3.0

4.5

6.0

90

36

18

15

115

45

23

20

135

60

27

23

ns

Maximum Propagation Delay, Output Enable to Y

(Figures 2 and 4)

2.0

3.0

4.5

6.0

120

45

24

20

150

60

30

26

180

80

36

31

ns

Maximum Propagation Delay, Output Enable to Y

(Figures 2 and 4)

2.0

3.0

4.5

6.0

90

36

18

15

115

45

23

20

135

60

27

23

ns

Maximum Output Transition Time, Any Output

(Figures 1 and 3)

2.0

3.0

4.5

6.0

60

22

12

10

75

28

15

13

90

34

18

15

ns

Maximum Input Capacitance

−

10

10

10

pF

Maximum 3−State Output Capacitance (Output in High−Impedance State)

−

15

15

15

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON

Semiconductor High−Speed CMOS Data Book (DL129/D).

Power Dissipation Capacitance (Per Buffer)*

pF

30

ON Semiconductor High−Speed CMOS Data Book (DL129/D).

ORDERING INFORMATION

Device

Package

74HC125DR2G

SOIC−14

(Pb−Free)

2500 / Tape & Reel

74HC125DTR2G

TSSOP−14*

2500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.