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AD7298 Datenblatt(PDF) 6 Page - Analog Devices

Teilenummer AD7298
Bauteilbeschribung  8-Channel, 1MSPS, 12-Bit SAR ADC with Temperature Sensor
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AD7298
Preliminary Technical Data
Rev. PrA | Page 6 of 18
PIN CONFIGURATION AND FUNCTION DESCRIPTION
Figure 2. Pin Configuration
Note: The exposed metal paddle on the bottom of the LFCSP package
should be soldered to PCB ground for proper heat dissipation & performance
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1-5, 18,
19, 20
VIN1, VN2, VN3,
VN4, VN5, VN6
VN7, VN8
Analog Inputs. The AD7298 has 8 single-ended analog inputs that are multiplexed into the on-chip track-and-
hold. Each input channel can accept analog inputs from 0V to 2.5V. Any unused input channels should be
connected to GND1 to avoid noise pickup.
14
DOUT
Serial Data Output. The conversion result from the AD7298 is provided on this output as a serial data stream. The
bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7298 consists of four
address bits indicating which channel the conversion result corresponds to, followed by the 12 bits of conversion
data (MSB first). The output coding is straight binary for the voltage channels and two’s complement for the
temperature sensor result.
16
VDRIVE
Logic Power Supply Input. The voltage supplied at this pin determines at the voltage at which the interface
operates. This pin should be decoupled to GND. The voltage range on this pin is 1.65V to 3.6V and may be less
than the voltage at VDD, but should never exceed it by more than 0.3V.
10
VDD
Supply Voltage, 2.8 V to 3.6 V. This supply should be decoupled to GND with 10 µF and 100 nF decoupling
capacitors.
7
VREF
Internal Reference / External Reference supply. The nominal internal reference voltage of 2.5V appears at this pin.
Provided the output is buffered, the on-chip reference can be taken from this pin and applied externally to the
rest of a system. Decoupling capacitors should be connected to this pin to decouple the reference buffer. For best
performance, it is recommended to use a 10 μF decoupling capacitor on this pin to GND1. The internal reference
can be disabled and an external reference supplied to this pin if required. The input voltage range for the external
reference is 2.0 V to 2.5V.
6
GND1
Ground. Ground reference point for the internal reference circuitry on the AD7298. The external reference signals
and all analog input signals should be referred to this GND1 voltage. The GND1 pin should be connected to the
GND plane of a system. All GND1 pins should ideally be at the same potential and must not be more than 0.3 V
apart, even on a transient basis. The VREF should be decoupled to this ground pin via a 10 μF decoupling cap.
9
GND
Ground. Ground reference point for all analog and digital circuitry on the AD7298. The GND pin should be
connected to the GND plane of the system. All GND pins should ideally be at the same potential and must not be
more than 0.3 V apart, even on a transient basis. Both DCAP and VDD should be decoupled to this GND pin.
11
CS
Chip Select, Active Low Logic Input. This pin is edge triggered, on the falling edge of this input, the track/hold
goes into hold mode and a conversion is initiated. This input also frames the serial data transfer. When CS is low,
the output bus is enabled, and the conversion result becomes available on the DOUT output.
15
SCLK
Serial Clock, Logic Input. A serial clock input provides the SCLK for accessing the data from the AD7298.


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