Datenblatt-Suchmaschine für elektronische Bauteile |
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DM9008AEP Datenblatt(PDF) 10 Page - Davicom Semiconductor, Inc. |
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DM9008AEP Datenblatt(HTML) 10 Page - Davicom Semiconductor, Inc. |
10 / 50 page DM9008AEP Ethernet Controller with General Processor Interface Preliminary 10 Version: DM9008AEP-DS-P03 Dec. 14, 2006 5.3 Clock Interface Pin No. Pin Name Type Description 43 X2 O Crystal 25MHz Out 44 X1 I Crystal 25MHz In 5.4 LED Interface Pin No. Pin Name Type Description 39 LED1 O Speed LED Its low output indicates that the internal PHY is operated in 100M/S, or it is floating for the 10M mode of the internal PHY. This pin also acts as ISA bus IO16 function defined in EEPROM setting. 38 LED2 O Link / Active LED In LED mode 1, it is the combined LED of link and carrier sense signal of the internal PHY In LED mode 0, it is the LED of the carrier sense signal of the internal PHY only 5.5 10/100 PHY/Fiber Pin No. Pin Name Type Description 46 SD I Fiber-optic Signal Detect PECL signal, which indicates whether or not the fiber-optic receive pair is receiving valid levels 48 BGGND P Bandgap Ground 1 BGRES I/O Bandgap Pin 2 RXVDD25 P 2.5V power output for TP RX 9 TXVDD25 P 2.5V power output for TP TX 3 RX+ I/O TP RX Input 4 RX- I/O TP RX Input 5,47 RXGND P RX Ground 6 TXGND P TX Ground 7 TX+ I/O TP TX Output 8 TX- I/O TP TX Output 5.6 Miscellaneous Pin No. Pin Name Type Description 41 TEST I Operation Mode Force to ground in normal application 40 PWRST# I Power on Reset Active low signal to initiate the DM9008A The DM9008A is ready after 5us when this pin deasserted |
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