Datenblatt-Suchmaschine für elektronische Bauteile |
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BU1574GUW Datenblatt(PDF) 8 Page - Rohm |
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BU1574GUW Datenblatt(HTML) 8 Page - Rohm |
8 / 13 page Technical Note 8/12 BU1574GUW www.rohm.com 2009.06 - Rev.A © 2009 ROHM Co., Ltd. All rights reserved. CAMHSI CAMVSI CAMDIO -CAMDI7 YSIZE AIE_YSIZE line Original image AIE_YSIZE -1 Line. 2 Line. 3 Line. 1 Invalid area AIE_YST line AIE_YSIZE CAMCKI (*1) Y0 Cb0 Y1 Cr0 Y2 Cb1 Cr1 Y3 Cr158 Y318 Y317 Cr158 ( *2) AIE_XSIZE ×2 Y0 Cb0 Y1 Cr0 Y2 Cb1 Cr1 Y3 Cr158 Y318 Cb158 XSIZE ×2 AIE varid area ( *2) YUV_XST CAMDI0 -CAMDI7 (*3) CAMHSI AIE_XST×2 Y318 Cb159 Y319 Cr159 Y318 Image area 8.2. YCbCr with synchronizing signals 8-bit input format 8.2.1. Horizontal direction synchronization timing Fig.7 Horizontal direction synchronization timing (Note) * YUV_XST, XSIZE x 2, AIE_XST x 2 and AIE_XSIZE×2, which are described in the figures and the notes, are set by the registers. (*1) By changing the setting of the POL register (INDEX Address: E1h), the polarities of CAMCKI, CAMVSI and CAMHSI can be set independently. The figure above shows the timing in the case that the data are fetched at the CAMCKI falling edge (CKPOL = 1 setting) and the polarity of HSYNC is low active (HSPOL = 0 setting). (*2) Set CAMHSI so as not to become 'L' in other sections than the sync section (CAMHSI = 'L' section in the figure shown above). (*3) Do not change the frequency of CAMCKI during the operation. (*4) Take note of the items described above to input each signal. 8.2.2. Vertical direction synchronization timing Fig.8 Vertical direction synchronization timing (Note) * Y_SIZE, AIE_YST and AIE_YSIZE, which are described in the figures and the notes, are set by the registers. (*1) The figure above shows the timing in the case that the polarity of VSYNC is low active (VSPOL = 0 setting) and also the polarity of HSYNC is low active (HSPOL = 0 setting). (*2) Take note of the items described above to input each signal. |
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