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74ABT646ADB Datenblatt(PDF) 11 Page - NXP Semiconductors |
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74ABT646ADB Datenblatt(HTML) 11 Page - NXP Semiconductors |
11 / 19 page 74ABT646A_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 15 March 2010 11 of 19 NXP Semiconductors 74ABT646A Octal bus transceiver/register; 3-state VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load. Fig 9. 3-state output enable time to LOW-level and output disable time from LOW-level 001aae898 An or Bn VM VI GND 3.5 V VOL VM tPLZ tPZL VM OE, DIR VOL + 0.3 V VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 10. Data set-up and hold times 001aae849 VM VI GND VI GND An, Bn CPBA or CPAB VM VM VM VM VM tsu(H) th(H) tsu(L) tWL th(L) |
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