Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

74AUP1G332 Datenblatt(PDF) 1 Page - NXP Semiconductors

Teilenummer 74AUP1G332
Bauteilbeschribung  Low-power 3-input OR gate
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

74AUP1G332 Datenblatt(HTML) 1 Page - NXP Semiconductors

  74AUP1G332 Datasheet HTML 1Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 2Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 3Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 4Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 5Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 6Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 7Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 8Page - NXP Semiconductors 74AUP1G332 Datasheet HTML 9Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 16 page
background image
1.
General description
The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G332 provides a single 3-input OR gate.
2.
Features
I Wide supply voltage range from 0.8 V to 3.6 V
I High noise immunity
I Complies with JEDEC standards:
N JESD8-12 (0.8 V to 1.3 V)
N JESD8-11 (0.9 V to 1.65 V)
N JESD8-7 (1.2 V to 1.95 V)
N JESD8-5 (1.8 V to 2.7 V)
N JESD8-B (2.7 V to 3.6 V)
I ESD protection:
N HBM JESD22-A114E Class 3A exceeds 5000 V
N MM JESD22-A115-A exceeds 200 V
N CDM JESD22-C101-C exceeds 1000 V
I Low static power consumption; ICC = 0.9 µA (maximum)
I Latch-up performance exceeds 100 mA per JESD 78 Class II
I Inputs accept voltages up to 3.6 V
I Low noise overshoot and undershoot < 10 % of VCC
I IOFF circuitry provides partial Power-down mode operation
I Multiple package options
I Specified from −40 °Cto+85 °C and −40 °C to +125 °C
74AUP1G332
Low-power 3-input OR gate
Rev. 02 — 29 February 2008
Product data sheet


Ähnliche Teilenummer - 74AUP1G332

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
NXP Semiconductors
74AUP1G332 PHILIPS-74AUP1G332 Datasheet
67Kb / 18P
   Low-power 3-input OR gate
Rev.01.00-27 February2006
logo
Nexperia B.V. All right...
74AUP1G332 NEXPERIA-74AUP1G332 Datasheet
252Kb / 16P
   Low-power 3-input OR-gate
Rev. 7 - 20 January 2022
logo
NXP Semiconductors
74AUP1G332GF PHILIPS-74AUP1G332GF Datasheet
67Kb / 18P
   Low-power 3-input OR gate
Rev.01.00-27 February2006
74AUP1G332GM PHILIPS-74AUP1G332GM Datasheet
67Kb / 18P
   Low-power 3-input OR gate
Rev.01.00-27 February2006
logo
Nexperia B.V. All right...
74AUP1G332GM NEXPERIA-74AUP1G332GM Datasheet
252Kb / 16P
   Low-power 3-input OR-gate
Rev. 7 - 20 January 2022
More results

Ähnliche Beschreibung - 74AUP1G332

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
NXP Semiconductors
74AUP1G332 PHILIPS-74AUP1G332 Datasheet
67Kb / 18P
   Low-power 3-input OR gate
Rev.01.00-27 February2006
logo
Nexperia B.V. All right...
74AUP1G332 NEXPERIA-74AUP1G332 Datasheet
252Kb / 16P
   Low-power 3-input OR-gate
Rev. 7 - 20 January 2022
74AUP1G386 NEXPERIA-74AUP1G386 Datasheet
255Kb / 16P
   Low-power 3-input EXCLUSIVE-OR gate
Rev. 8 - 21 January 2022
logo
NXP Semiconductors
74AUP1G0832 PHILIPS-74AUP1G0832 Datasheet
70Kb / 19P
   Low-power 3-input AND-OR gate
Rev.01.00-26 January2006
logo
Nexperia B.V. All right...
74AUP1G0832 NEXPERIA-74AUP1G0832 Datasheet
259Kb / 16P
   Low-power 3-input AND-OR gate
Rev. 6 - 14 January 2022
logo
NXP Semiconductors
74AUP1G0832 NXP-74AUP1G0832 Datasheet
95Kb / 16P
   Low-power 3-input AND-OR gate
Rev. 02-3 July 2009
74AUP1G3208 NXP-74AUP1G3208 Datasheet
94Kb / 16P
   Low-power 3-input OR-AND gate
Rev. 02-3 July 2009
74AUP1G3208GF NXP-74AUP1G3208GF Datasheet
264Kb / 19P
   Low-power 3-input OR-AND gate
Rev. 5-22 June 2012
74AUP1G3208 PHILIPS-74AUP1G3208 Datasheet
71Kb / 19P
   Low-power 3-input OR-AND gate
Rev.01.00-17 January 2006
74AUP1G386 NXP-74AUP1G386 Datasheet
93Kb / 16P
   Low-power 3-input EXCLUSIVE-OR gate
Rev. 03-2 July 2009
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com