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DAC1405D750 Datenblatt(PDF) 10 Page - NXP Semiconductors |
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DAC1405D750 Datenblatt(HTML) 10 Page - NXP Semiconductors |
10 / 43 page DAC1405D750_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Preliminary data sheet Rev. 01 — 10 March 2010 10 of 43 NXP Semiconductors DAC1405D750 Dual 14-bit DAC, up to 750 Msps; 4 × and 8× interpolating Clock inputs (CLKP and CLKN)[2] Vi input voltage CLKN |V gpd| <50mV or CLKP C [3] 825 - 1575 mV Vidth input differential threshold voltage |V gpd| <50 mV C [3] −100 - +100 mV Ri input resistance D - 10 - M Ω Ci input capacitance D - 0.5 - pF Clock outputs (SYNCP and SYNCN) Vo(cm) common mode output voltage C- VDDA(1V8) − 0.3 -V VO(dif) differential output voltage C <tbd> 1.2 - V Ro output resistance D - 80 - Ω Digital inputs (I0 to I13, Q0 to Q13) VIL LOW-level input voltage C GNDIO - 1.0 V VIH HIGH-level input voltage C 2.3 - VDD(IO)(3V3) V IIL LOW-level input current VIL =1.0 V I - 60 - μA IIH HIGH-level input current VIH =2.3 V I - 80 - μA Digital inputs (SDO, SDIO, SCLK, SCS_N and RESET_N) VIL LOW-level input voltage C GNDIO - 1.0 V VIH HIGH-level input voltage C 2.3 - VDD(IO)(3V3) V IIL LOW-level input current VIL =1.0 V I - 20 - nA IIH HIGH-level input current VIH =2.3 V I - 20 - nA Analog outputs (IOUTAP, IOUTAN, IOUTBP and IOUTBN) IO(fs) full-scale output current register value = 00h C - 1.6 - mA default register C - 20 - mA VO output voltage compliance range C 1.8 - VDDA(3V3) V Ro output resistance D - 250 - k Ω Co output capacitance D - 3 - pF ΔE O offset error variation C - 6 - ppm/ °C ΔE G gain error variation C - 18 - ppm/ °C Reference voltage output (GAPOUT) VO(ref) reference output voltage Tamb =25 °CI 1.2 1.25 1.29 V ΔV O(ref) reference output voltage variation C- 117 - ppm/ °C IO(ref) reference output current external voltage 1.25 V D - 40 - μA Analog auxiliary outputs (AUXAP, AUXAN, AUXBP and AUXBN) IO(aux) auxiliary output current differential outputs I - 2.2 - mA VO(aux) auxiliary output voltage compliance range C 0 - 2 V NDAC(aux)mono auxiliary DAC monotonicity guaranteed D - 10 - bit Table 5. Characteristics …continued VDDA(1V8) =VDDD(1V8) = 1.8 V; VDDA(3V3) =VDD(IO)(3V3) = 3.3 V; AGND, DGND and GNDIO shorted together; Tamb = −40 °Cto+85 °C; typical values measured at Tamb =25 °C; RL = 50 Ω differential; IO(fs) = 20 mA; PLL off unless otherwise specified. Symbol Parameter Conditions Test[1] Min Typ Max Unit |
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