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CDCEL913PW Datenblatt(PDF) 3 Page - Texas Instruments

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Teilenummer CDCEL913PW
Bauteilbeschribung  Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

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EEPROM
Xin/CLK
Xout
VDD
GND
InputClock
Vctr
S0
Programming
and
SDA/SCL
Register
Y2
Y1
Y3
LV
CMOS
Pdiv1
10-Bit
LV
CMOS
Pdiv3
7-Bit
Pdiv2
7-Bit
PLL Bypass
LV
CMOS
PLL 1
withSSC
S1/SDA
S2/SCL
VCXO
XO
LVCMOS
VDDOUT
CDCE913
CDCEL913
www.ti.com
SCAS849E – JUNE 2007 – REVISED MARCH 2010
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
VDD
Supply voltage range
–0.5 to 2.5
V
VI
Input voltage range(2) (3)
–0.5 to VDD + 0.5
V
VO
Output voltage range(2)
–0.5 to VDD + 0.5
V
II
Input current (VI < 0, VI > VDD)
20
mA
IO
Continuous output current
50
mA
Tstg
Storage temperature range
–65 to 150
°C
TJ
Maximum junction temperature
125
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
SDA and SCL can go up to 3.6V as stated in the Recommended Operating Conditions table.
PACKAGE THERMAL RESISTANCE for TSSOP (PW) PACKAGE
(1) (2)
over operating free-air temperature range (unless otherwise noted)
AIRFLOW
TSSOP14
PARAMETER
(lfm)
°C/W
0
106
150
93
TJA
Thermal Resistance Junction to Ambient
200
92
250
90
500
85
TJC
Thermal Resistance Junction to Case
43
TJB
Thermal Resistance Junction to Board
66
RqJT
Thermal Resistance Junction to Top
1.4
RqJB
Thermal Resistance Junction to Bottom
62
(1)
The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).
(2)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Copyright © 2007–2010, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Link(s): CDCE913 CDCEL913


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