Datenblatt-Suchmaschine für elektronische Bauteile |
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ISL45041EVAL1Z Datenblatt(PDF) 5 Page - Intersil Corporation |
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ISL45041EVAL1Z Datenblatt(HTML) 5 Page - Intersil Corporation |
5 / 7 page 5 FN6189.1 April 4, 2006 Application Information This device provides the ability to reduce the flicker of an LCD panel by adjustment of the VCOM voltage during production test and alignment. A 128-step resolution is provided under digital control, which adjusts the sink current of the output. The output is connected to an external voltage divider, so that the device will have the capability to reduce the voltage on the output by increasing the output sink current. The adjustment of the output is provided by the 2 wire I2C serial interface. Expected Output Voltage The ISL45041 provides an output sink current which lowers the voltage on the external voltage divider (VCOM output voltage). Equation 1 and Equation 2 can be used to calculate the output current (IOUT) and output voltage (VOUT) values. NOTE: Where setting is an integer between 1 and 128. Table 1 gives the calculated value of VOUT for the eval board using the on board resistors values of: RSET = 24.9k, R1 = 200k, R2 = 243k, and AVDD = 10V. RSET Resistor The external RSET resistor sets the full-scale sink current that determines the lowest voltage of the external voltage divider R1 and R2 (Figure 1). The maximum ISET current has to be less than 120 μA. The minimum RSET resistor with AVDD equal to 10V is 4.17k Ω (10V/(20*120μA). Typical applications with AVDD equal to 10V set RSET equal to 24.9k Ω for a set current equal to 20μA. Ramp-Up of the VDD Power Supply It is required that the ramp-up from 10% VDD to 90% VDD level be achieved in less than or equal to 10 ms to assure that the EEPROM and Power-on-reset circuits are synchronized and the correct value is read from the EEPROM Memory. I2C Timing Diagram Figure 2 shows the I2C timing diagram and expected scope photos of SCL and SDA when writing all zeros or all ones. RSET FIGURE 1. OUTPUT CONNECTION CIRCUIT EXAMPLE - + ISL45041 SET OUT AVDD R1 R2 AVDD ISET IOUT Setting 128 --------------------- X AVDD 20 RSET () ----------------------------- = VOUT R2 R1 R2 + ---------------------- ⎝⎠ ⎛⎞ AVDD 1 Setting 128 --------------------- X R1 20 RSET () ----------------------------- – ⎝⎠ ⎛⎞ = (EQ. 1) (EQ. 2) TABLE 1. SETTING VALUE VOUT 1 5.468 10 5.313 20 5.141 30 4.969 40 4.797 50 4.625 60 4.453 70 4.281 80 4.109 90 3.936 100 3.764 110 3.592 128 3.282 ISL45041 |
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