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ISL23415WFRUZ-T7A Datenblatt(PDF) 7 Page - Intersil Corporation

Teilenummer ISL23415WFRUZ-T7A
Bauteilbeschribung  Single, Low Voltage Digitally Controlled Potentiometer (XDCP??
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Hersteller  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL23415WFRUZ-T7A Datenblatt(HTML) 7 Page - Intersil Corporation

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ISL23415
7
FN7780.0
December 15, 2010
Serial Interface Specification For SCK, SDI, SDO, CS Unless Otherwise Noted.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
MAX
(Note 20)
UNITS
VIL
Input LOW Voltage
-0.3
0.3 x VLOGIC
V
VIH
Input HIGH Voltage
0.7 x VLOGIC
VLOGIC+ 0.3
V
Hysteresis
SDI and SCK Input Buffer Hysteresis
VLOGIC > 2V
0.05 x VLOGIC
V
VLOGIC < 2V
0.1 x VLOGIC
VOL
SDO Output Buffer LOW Voltage
IOL = 3mA, VLOGIC > 2V
0
0.4
V
IOL = 1.5mA, VLOGIC < 2V
0.2 x VLOGIC
V
Rpu
(Note 19)
SDO pull-up resistor off-chip
Maximum is determined by tRO and tFO with
maximum bus load Cb = 30pF, fSCK =5MHz
1.5
k
Ω
Cpin
SCK, SDO, SDI, CS Pin Capacitance
10
pF
fSCK
SCK Frequency
VLOGIC = 1.7V to 5.5V
5
MHz
VLOGIC = 1.2V to 1.6V
1
MHz
tCYC
SPI clock cycle time
VLOGIC ≥ 1.7V
200
ns
tWH
SPI clock high time
VLOGIC ≥ 1.7V
100
ns
tWL
SPI clock low time
VLOGIC ≥ 1.7V
100
ns
tLEAD
Lead time
VLOGIC ≥ 1.7V
250
ns
tLAG
Lag time
VLOGIC ≥ 1.7V
250
ns
tSU
SDI, SCK and CS input setup time
VLOGIC ≥ 1.7V
50
ns
tH
SDI, SCK and CS input hold time
VLOGIC ≥ 1.7V
50
ns
tRI
SDI, SCK and CS input rise time
VLOGIC ≥ 1.7V
10
ns
tFI
SDI, SCK and CS input fall time
VLOGIC ≥ 1.7V
10
20
ns
tDIS
SDO output Disable time
VLOGIC ≥ 1.7V
0
100
ns
tSO
SDO output setup time
VLOGIC ≥ 1.7V
50
ns
tV
SDO output valid time
VLOGIC ≥ 1.7V
150
ns
tHO
SDO output hold time
VLOGIC ≥ 1.7V
0
ns
tRO
SDO output rise time
Rpu = 1.5k, Cbus = 30pF
60
ns
tFO
SDO output fall time
Rpu = 1.5k, Cbus = 30pF
60
ns
tCS
CS deselect time
2µs
NOTES:
8. Typical values are for TA = +25°C and 3.3V supply voltages.
9. LSB = [V(RW)255 – V(RW)0]/255. V(RW)255 and V(RW)0 are V(RW) for the DCP register set to FF hex and 00 hex respectively. LSB is the incremental
voltage when changing from one tap to an adjacent tap.
10. ZS error = V(RW)0/LSB.
11. FS error = [V(RW)255 – VCC]/LSB.
12. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 255. i is the DCP register setting.
13. INL = [V(RW)i – i • LSB – V(RW)0]/LSB for i = 1 to 255
14.
for i = 16 to 255 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper voltage
and Min( ) is the minimum value of the wiper voltage over the temperature range.
15. MI =
|RW255 – RW0|/255. MI is a minimum increment. RW255 and RW0 are the measured resistances for the DCP register set to FF hex and 00
hex respectively.
16. Roffset = RW0/MI, when measuring between RW and RL.
Roffset = RW255/MI, when measuring between RW and RH.
17. RDNL = (RWi – RWi-1)/MI -1, for i = 16 to 255.
18. RINL = [RWi – (MI • i) – RW0]/MI, for i = 16 to 255.
19.
for i = 16 to 255, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min( ) is the
minimum value of the resistance over the temperature range.
20. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
TCV
Max V RW
()i
() Min V RW
()i
()
VRWi +25°C
()
()
------------------------------------------------------------------------------
106
+165°C
---------------------
×
=
TCR
Max Ri
() Min Ri
()
[]
Ri +25°C
()
-------------------------------------------------------
10
6
+165°C
---------------------
×
=


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