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LC723748 Datenblatt(PDF) 11 Page - Sanyo Semicon Device |
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LC723748 Datenblatt(HTML) 11 Page - Sanyo Semicon Device |
11 / 14 page No. 5931-11/14 LC723732/40/48/56/64 Continued from preceding page. Pin No. Symbol I/O Function Equivalent circuit General-purpose I/O ports The mode is switched between input and output with the IOS instruction. Input is disabled and the pins go to the high-impedance state in backup mode. These ports are set up as general-purpose input ports after a power on reset. 68 to 61 PL0 to 3 PN0 to 3 I/O General-purpose I/O port and beep tone output shared function ports The IOS2 instruction is used to switch between the general-purpose I/O port and the beep tone output functions. • When used as a general-purpose input ports: The general-purpose I/O port function is set up with the IOS2 instruction. (Pins PN1 through PN3 are general-purpose I/O pins.) • When used as the beep tone output pin: The beep tone output function is set up with the IOS2 instruction. The frequency is set with the BEEP instruction. When this pin is used as the beep tone output pin, executing an output instruction for this pin only sets the internal latch and has no influence on the output. Input is disabled and the pins go to the high-impedance state in backup mode. These ports are set up as general-purpose input ports after a power on reset. 60 59 58 57 PN0/BEEP PN1 PN2 PN3 I/O General-purpose I/O ports The mode is switched between input and output with the IOS instruction. Input is disabled and the pins go to the high-impedance state in backup mode. These ports are set up as general-purpose input ports after a power on reset. 56 to 49 P00 to 3 PP0 to 3 I/O General-purpose I/O ports The mode is switched between input and output with the IOS instruction, and data is input with the INR instruction and output with the OUTR instruction. The SPB, RPB, TPT, and TPF instruction cannot be used with these ports. Input is disabled and the pins go to the high-impedance state in backup mode. These ports are set up as general-purpose input ports after a power on reset. 48 to 41 38 to 33 PQ0 to 3 PR0 to 3 PS0 to 3 PT0 to 1 I/O IC test pins These pins must be tied to ground. 99 2 TEST1 TEST2 |
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