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LC72705E Datenblatt(PDF) 7 Page - Sanyo Semicon Device |
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LC72705E Datenblatt(HTML) 7 Page - Sanyo Semicon Device |
7 / 14 page • Frame synchronization error protection count This IC detects the four unique BIC inflection points that exist in a single frame, and increments or decrements the protection counter depending on whether or not the IC internal frame synchronization counter matches. The data values are set in the same way as those for the block synchronization protection count are set, namely data in which 1 has been subtracted from the desired protection count must be transferred. The frame synchronization default values are 8 for forward protection and 2 for backward protection. • Control registers These registers are used to set the IC operating mode. These are described later. • Notes — The address bits DI12 to DI15 are ignored. — Addresses other than those listed above (for example location 0110) are special addresses used for test mode and other special IC functions. Do not set these locations. — The default values are the values reloaded into the internal registers when a reset signal (RST) is received. These values are the recommended values for normal operation, and normally do not need to be modified. If only the default values are used, there is no need to provide data transfer routines in the external CPU or microcontroller. Layer 4 CRC Check Circuit This is a function provided for data group error detection, i.e. layer 4 CRC. After the stipulated number of bytes of data group data and a 16-bit CRC error check word are transferred, the CRC4 pin outputs a high level if there were no errors. The CRC4 pin outputs a high level if all the bits in the IC internal CRC check register were 0. When using this function to perform the layer 4 CRC check, the IC internal CRC check register must be initialized before a single data group data unit is transferred. This register is initialized by sending bit 7 of the control register. Note that since this flag is not automatically reset to 0, the application must return it to 0 before transferring layer 4 CRC check data. If there were no errors in any of the received data groups, the CRC register will always be all zeros after the CRC check of a single data group. Therefore, the above control register initialization will not be necessary as long as there are no errors in the layer 4 CRC. The data length of the transferred data group data is in units of 8 bits. Also note that while there is no upper limit on the amount of data transferred in a single operation, data transfers may also be divided into multiple transfer operations. No. 5744-7/14 LC72705E Note: *Both forward and backward protection counts are 3. Figure 1 Block Synchronization Protection Operation (forward → backward → forward) Received data Synchronization counter BIC position Reset |
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