AD5755-1ACPZ-REEL7 datasheet(2/48 Pages) AD

Teilenummer	AD5755-1ACPZ-REEL7

Bauteilbeschribung	Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA and Voltage Output DAC,Dynamic Power Control

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AD5755-1

Rev. A | Page 2 of 48

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Companion Products ....................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Detailed Functional Block Diagram .............................................. 3

Specifications..................................................................................... 4

AC Performance Characteristics ................................................ 7

Timing Characteristics ................................................................ 7

Absolute Maximum Ratings.......................................................... 11

ESD Caution................................................................................ 11

Pin Configuration and Function Descriptions........................... 12

Typical Performance Characteristics ........................................... 15

Voltage Outputs .......................................................................... 15

Current Outputs ......................................................................... 19

DC-to-DC Block......................................................................... 23

Reference ..................................................................................... 24

General......................................................................................... 25

Terminology .................................................................................... 26

Theory of Operation ...................................................................... 28

DAC Architecture....................................................................... 28

Power-On State of the AD5755-1............................................. 28

Serial Interface ............................................................................ 29

Transfer Function ....................................................................... 29

Registers ........................................................................................... 30

Programming Sequence to Write/Enable the Output

Correctly ...................................................................................... 31

Changing and Reprogramming the Range ............................. 31

Data Registers ............................................................................. 32

Control Registers........................................................................ 34

Readback Operation .................................................................. 37

Device Features............................................................................... 39

Output Fault................................................................................ 39

Voltage Output Short-Circuit Protection................................ 39

Digital Offset and Gain Control............................................... 39

Status Readback During a Write .............................................. 39

Asynchronous Clear................................................................... 40

Packet Error Checking............................................................... 40

Watchdog Timer......................................................................... 40

Output Alert................................................................................ 40

Internal Reference ...................................................................... 40

External Current Setting Resistor ............................................ 40

HART ........................................................................................... 41

Digital Slew Rate Control.......................................................... 41

Power Dissipation control......................................................... 42

DC-to-DC Converters............................................................... 42

AICC Supply Requirements—Static .......................................... 43

AICC Supply Requirements—Slewing ...................................... 43

Applications Information .............................................................. 45

Voltage and Current Output Ranges on the Same Terminal 45

Current Output Mode with Internal RSET................................ 45

Precision Voltage Reference Selection..................................... 45

Driving Inductive Loads............................................................ 46

Transient Voltage Protection .................................................... 46

Microprocessor Interfacing....................................................... 46

Layout Guidelines....................................................................... 46

Galvanically Isolated Interface ................................................. 47

Outline Dimensions ....................................................................... 48

Ordering Guide .......................................................................... 48

REVISION HISTORY

5/11—Rev. 0 to Rev. A

Removed Endnote 6 (Table 1)......................................................... 6

Changed AVDD Minimum Value from 10.8 V to 9 V................... 6

Changed AISS Minimum Value from −1.4 mA to −1.7 mA ........ 7

Changed AVDD Voltage in Pin 19 Description ............................ 13

Changes to Ordering Guide .......................................................... 48

4/11—Revision 0: Initial Version

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