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ISL55210IRTZ-T7 Datenblatt(PDF) 10 Page - Intersil Corporation

Teilenummer ISL55210IRTZ-T7
Bauteilbeschribung  Wideband, Low-Power, Ultra-High Dynamic Range
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Hersteller  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL55210IRTZ-T7 Datenblatt(HTML) 10 Page - Intersil Corporation

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ISL55210
10
FN7811.0
March 2, 2011
Applications
Basic Operation
The ISL55210 is a very wideband, voltage feedback based,
differential amplifier including an output common mode control
loop and optional power shutdown feature. Intended for very low
distortion differential signal driving, this non-unity gain stable
device also delivers extremely low input noise terms of
0.85nV/√Hz and 5pA/√Hz. Most applications are intended for AC
coupled I/O using a single 3.3V supply. It will operate over a
single supply range of 3.0V to 4.2V. Where DC coupled operation
is desired, using split power supplies will allow the ISL55210 I/O
common mode range limits to be observed while giving either a
differential I/O or single to differential configuration.
Most applications behave as a differential inverting op amp design.
There is, therefore, an input gain resistor on each side of the inputs
that must be driven. To retain overall low output noise, these
resistors are normally of low value. The device can be powered down
to <400µA supply current using the optional disable pin. To operate
normally, this pin should be asserted high using a simple logic gate
to +VS or tied high through a 10kΩ resistor to +VS. When disabled,
the power dissipation drops to <1mW but, due to the inverting op
amp type architecture, the input signal will feed forward through the
external resistors giving limited isolation.
Application and Characterization Circuits
The circuit of Figure 28 forms a starting point for many of the
characterization curves for the ISL55210. Since most lab sources
and measurement devices are single-ended, this circuit converts
to differential at the input through a wideband transformer and
would also be a typical application circuit coming from a single
ended source. Assuming the source is a 50Ω impedance, the RG
resistors are set to provide both the input termination and the
gain. Since the inverting summing nodes act as virtual ground
points for AC signal analysis, the total termination impedance
across the input transformer secondary will be 2 * RG. Setting
this equal to n2*RS will give a matched input impedance inside
the bandwidth of the transformer (where "n" is the turns ratio).
The amplifier gain is then set by adjusting the feedback resistors
values. Since the ISL55210 is a VFA design, increasing the
feedback resistor to get higher gain does not directly reduce the
bandwidth as it would with a CFA based design. This gives
increased flexibility in the input turns ratio and overall gain
setting (while holding a matched input impedance) over
alternate solutions.
Working with a transformer coupled input as shown in Figure 28,
or with two DC blocking caps from a differential source, means
the output common mode voltage set by either the default
internal VCM setting, or a voltage applied to the VCM control pin,
will also appear as the input common mode voltage. This
provides a very easy way to control the ISL55210 I/O common
mode operating voltages for an AC coupled signal path. The
internal common mode loop holds the output pins to VCM and,
since there is no DC path for an ICM current back towards the
input in Figure 28, that VCM setting will also appear as the input
common mode voltage. It is useful, for this reason, to leave any
input transformer secondary centertap unconnected. The
internally set VCM voltage is referenced from the negative supply
pin. With a single 3.3V supply, it is very close to 1.2V but will
change with total supply voltage across the device as shown in
Figure 26.
FIGURE 26. DEFAULT VCM AND MAX VOPP vs SUPPLY VOLTAGE
FIGURE 27. SUPPLY CURRENT vs SUPPLY VOLTAGE
Typical Performance Curves V
S+ = 3.3V, TA ≈ +25°C, unless otherwise noted. (Continued)
1
2
3
4
5
6
3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 4.5
SUPPLY VOLTAGE (V)
TEST CIRCUIT #1
INTERNALLY SET VCM
MAXIMUM DIFFERENTIAL VP-P
OUTPUT USING DEFAULT VCM
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 4.5
SINGLE SUPPLY VOLTAGE (V)
TEST CIRCUIT #1
TA = +25°C
TA = -40°C
TA = +85°C
50
1:1.4
1µF
1µF
85
ISL55210
+3.3V
+
-
VI
50
50
35
35
ADT2-1T
0.1uF
200
VCM
200
200
33mA 110mW
1:1
ADT1-1WT
50
1µF
VM
VO
RG
RG
RF
RF
10k
PD
200
LOAD
85
1µF
FIGURE 28. TEST CIRCUIT #1


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