TEA1721AT

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2012. All rights reserved.

Preliminary data sheet

Rev. 1 — 24 January 2012

9 of 14

NXP Semiconductors

TEA1721AT

Ultra-low standby SMPS controller with integrated power switch

oscillator frequency

High

maximum switching frequency in CV

and CC mode, without jitter

48

50.5

53

kHz

oscillator frequency

Low

minimum switching frequency in CV

and CC mode, without jitter. Switching

frequency in CVB mode

21

22.5

24

kHz

jitter sweep frequency

In current source operation

150

200

250

Hz

maximum duty cycle

72

75

78

%

Power switch (Pin: DRAIN)

off-state drain current

-

1

-

µA

start-up drain current

-

1

-

mA

drain-source on-state

resistance

-

13.2

-

Ω

drain-source

breakdown voltage

700

--V

Peak current comparator (Pin: SOURCE)

overcurrent protection

delay time

dV/dt = 0.2 V/µs

-

100

-

ns

leading edge blanking

time

290

325

360

ns

reference voltage ,

high peak voltage

in CVF and CCF modes

0.525

0.555

0.585

V

reference voltage , low

peak voltage

in CVB mode

0.085

0.1

0.115

V

reference voltage at

start-up or 0 V

feedback voltage

0.18

0.21

0.24

V

Table 5.

positive currents flow into the IC, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit