LC877G16A

No.A2006-3/17

Infrared Remote Control Receiver Circuit 1

1) Noise rejection function

2) Supports receive formats with a guide-pulse of half-clock/clock/none.

3) Determines an end of receive by detecting a no-signal period (no carrier).

(Supports same receive format with a different bit length.)

High-speed Multiplication/Division Instructions

• 16 bits × 8 bits

(5 tCYC execution time)

• 24 bits × 16 bits

(12 tCYC execution time)

• 16 bits ÷ 8 bits

(8 tCYC execution time)

• 24 bits ÷ 16 bits

(12 tCYC execution time)

Interrupts

• 14 sources, 8 vectors

1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt request of

the level equal to or lower than the current interrupt is not accepted.

2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level

takes precedence over the other interrupts. For interrupts of the same level, an interrupt into the smallest vector

address is given priority.

No.

Vector Address

Level

Interrupt Source

1

00003H

X or L

INT0

2

0000BH

X or L

INT1

3

00013H

H or L

T0L/remote control receiver1

4

0001BH

H or L

INT3/base timer

5

00023H

H or L

T0H

6

7

00033H

H or L

UART receive/T8L/T8H

8

0003BH

H or L

UART transmit

9

10

0004BH

H or L

Port 0/T4/T5

• Priority levels: X > H > L

• When interrupts of the same level occur at the same time, an interrupt with the smallest vector address is given

priority.

Subroutine Stack Levels

• Up to 256 levels mum (stack is allocated in RAM)

Oscillator Circuits

• RC oscillator circuit (internal): For system clock

• CF oscillator circuit: For system clock, with internal Rf, and external Rd

 System Clock Divider Function

• Can run on low current.

• The minimum instruction cycle can be selected from among 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs, and

76.8

μs (at a main clock rate of 5MHz).